From owner-svn-src-all@FreeBSD.ORG Mon Jul 20 07:53:08 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 07A29106566C; Mon, 20 Jul 2009 07:53:08 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id CF80F8FC0A; Mon, 20 Jul 2009 07:53:07 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n6K7r7D7070137; Mon, 20 Jul 2009 07:53:07 GMT (envelope-from raj@svn.freebsd.org) Received: (from raj@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n6K7r7gb070133; Mon, 20 Jul 2009 07:53:07 GMT (envelope-from raj@svn.freebsd.org) Message-Id: <200907200753.n6K7r7gb070133@svn.freebsd.org> From: Rafal Jaworowski Date: Mon, 20 Jul 2009 07:53:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r195779 - head/sys/arm/arm X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Jul 2009 07:53:08 -0000 Author: raj Date: Mon Jul 20 07:53:07 2009 New Revision: 195779 URL: http://svn.freebsd.org/changeset/base/195779 Log: ARM pmap fixes. a) nocache-remap problem When a page is remapped into a non-cacheable virtual memory region there was no associated write-back invalidate operation performed. We remove writeback of the original buffer size from bus_dmamem_alloc() and add appropriate L1/L2 flush operation. b) missing write-back invalidate operation In pmap_kremove a page is removed so we must do a write-back invalidate operation aligned to the page virtual address. Submitted by: Michal Hajduk Reviewed by: Mark Tinguely, rpaulo, stas Approved by: re (kib) Obtained from: Semihalf Modified: head/sys/arm/arm/busdma_machdep.c head/sys/arm/arm/pmap.c head/sys/arm/arm/vm_machdep.c Modified: head/sys/arm/arm/busdma_machdep.c ============================================================================== --- head/sys/arm/arm/busdma_machdep.c Mon Jul 20 07:50:50 2009 (r195778) +++ head/sys/arm/arm/busdma_machdep.c Mon Jul 20 07:53:07 2009 (r195779) @@ -630,10 +630,6 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, voi ((vm_offset_t)*vaddr & PAGE_MASK)); newmap->origbuffer = *vaddr; newmap->allocbuffer = tmpaddr; - cpu_idcache_wbinv_range((vm_offset_t)*vaddr, - dmat->maxsize); - cpu_l2cache_wbinv_range((vm_offset_t)*vaddr, - dmat->maxsize); *vaddr = tmpaddr; } else newmap->origbuffer = newmap->allocbuffer = NULL; Modified: head/sys/arm/arm/pmap.c ============================================================================== --- head/sys/arm/arm/pmap.c Mon Jul 20 07:50:50 2009 (r195778) +++ head/sys/arm/arm/pmap.c Mon Jul 20 07:53:07 2009 (r195779) @@ -2984,6 +2984,7 @@ pmap_kremove(vm_offset_t va) pmap_free_pv_entry(pve); PMAP_UNLOCK(pmap_kernel()); vm_page_unlock_queues(); + va = va & ~PAGE_MASK; cpu_dcache_wbinv_range(va, PAGE_SIZE); cpu_l2cache_wbinv_range(va, PAGE_SIZE); cpu_tlb_flushD_SE(va); Modified: head/sys/arm/arm/vm_machdep.c ============================================================================== --- head/sys/arm/arm/vm_machdep.c Mon Jul 20 07:50:50 2009 (r195778) +++ head/sys/arm/arm/vm_machdep.c Mon Jul 20 07:53:07 2009 (r195779) @@ -426,10 +426,15 @@ arm_remap_nocache(void *addr, vm_size_t vm_offset_t tomap = arm_nocache_startaddr + i * PAGE_SIZE; void *ret = (void *)tomap; vm_paddr_t physaddr = vtophys((vm_offset_t)addr); + vm_offset_t vaddr = (vm_offset_t) addr; + vaddr = vaddr & ~PAGE_MASK; for (; tomap < (vm_offset_t)ret + size; tomap += PAGE_SIZE, - physaddr += PAGE_SIZE, i++) { + vaddr += PAGE_SIZE, physaddr += PAGE_SIZE, i++) { + cpu_idcache_wbinv_range(vaddr, PAGE_SIZE); + cpu_l2cache_wbinv_range(vaddr, PAGE_SIZE); pmap_kenter_nocache(tomap, physaddr); + cpu_tlb_flushID_SE(vaddr); arm_nocache_allocated[i / BITS_PER_INT] |= 1 << (i % BITS_PER_INT); }