From owner-svn-src-head@freebsd.org Wed Jan 20 13:53:35 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 21A19A89858; Wed, 20 Jan 2016 13:53:35 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id ED15E128C; Wed, 20 Jan 2016 13:53:34 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u0KDrXdS068316; Wed, 20 Jan 2016 13:53:33 GMT (envelope-from zbb@FreeBSD.org) Received: (from zbb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u0KDrX4C068312; Wed, 20 Jan 2016 13:53:33 GMT (envelope-from zbb@FreeBSD.org) Message-Id: <201601201353.u0KDrX4C068312@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: zbb set sender to zbb@FreeBSD.org using -f From: Zbigniew Bodek Date: Wed, 20 Jan 2016 13:53:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r294425 - in head/sys/arm/mv: . armada38x X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Jan 2016 13:53:35 -0000 Author: zbb Date: Wed Jan 20 13:53:33 2016 New Revision: 294425 URL: https://svnweb.freebsd.org/changeset/base/294425 Log: Set IO Sync Barrier flags for all Mbus devices on Armada38x IO Sync Barrier setting is required for I/O coherency. Reviewed by: andrew, ian, imp Obtained from: Semihalf Sponsored by: Stormshield Submitted by: Michal Stanek Differential revision: https://reviews.freebsd.org/D4219 Modified: head/sys/arm/mv/armada38x/armada38x.c head/sys/arm/mv/mv_machdep.c head/sys/arm/mv/mvwin.h Modified: head/sys/arm/mv/armada38x/armada38x.c ============================================================================== --- head/sys/arm/mv/armada38x/armada38x.c Wed Jan 20 13:51:14 2016 (r294424) +++ head/sys/arm/mv/armada38x/armada38x.c Wed Jan 20 13:53:33 2016 (r294425) @@ -32,10 +32,14 @@ __FBSDID("$FreeBSD$"); #include #include +#include + #include #include #include +int armada38x_win_set_iosync_barrier(void); + uint32_t get_tclk(void) { @@ -52,3 +56,25 @@ get_tclk(void) else return (TCLK_200MHZ); } + +int +armada38x_win_set_iosync_barrier(void) +{ + bus_space_handle_t vaddr_iowind; + int rv; + + rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_MBUS_BRIDGE_BASE, + MV_CPU_SUBSYS_REGS_LEN, 0, &vaddr_iowind); + if (rv != 0) + return (rv); + + /* Set Sync Barrier flags for all Mbus internal units */ + bus_space_write_4(fdtbus_bs_tag, vaddr_iowind, MV_SYNC_BARRIER_CTRL, + MV_SYNC_BARRIER_CTRL_ALL); + + bus_space_barrier(fdtbus_bs_tag, vaddr_iowind, 0, + MV_CPU_SUBSYS_REGS_LEN, BUS_SPACE_BARRIER_WRITE); + bus_space_unmap(fdtbus_bs_tag, vaddr_iowind, MV_CPU_SUBSYS_REGS_LEN); + + return (rv); +} Modified: head/sys/arm/mv/mv_machdep.c ============================================================================== --- head/sys/arm/mv/mv_machdep.c Wed Jan 20 13:51:14 2016 (r294424) +++ head/sys/arm/mv/mv_machdep.c Wed Jan 20 13:53:33 2016 (r294425) @@ -66,6 +66,9 @@ static int platform_mpp_init(void); void armadaxp_init_coher_fabric(void); void armadaxp_l2_init(void); #endif +#if defined(SOC_MV_ARMADA38X) +int armada38x_win_set_iosync_barrier(void); +#endif #define MPP_PIN_MAX 68 #define MPP_PIN_CELLS 2 @@ -249,6 +252,12 @@ platform_late_init(void) #endif armadaxp_l2_init(); #endif + +#if defined(SOC_MV_ARMADA38X) + /* Set IO Sync Barrier bit for all Mbus devices */ + if (armada38x_win_set_iosync_barrier() != 0) + printf("WARNING: could not map CPU Subsystem registers\n"); +#endif } #define FDT_DEVMAP_MAX (MV_WIN_CPU_MAX + 2) Modified: head/sys/arm/mv/mvwin.h ============================================================================== --- head/sys/arm/mv/mvwin.h Wed Jan 20 13:51:14 2016 (r294424) +++ head/sys/arm/mv/mvwin.h Wed Jan 20 13:53:33 2016 (r294425) @@ -305,6 +305,16 @@ #define MV_WIN_SATA_BASE(n) (0x10 * (n) + 0x34) #define MV_WIN_SATA_MAX 4 +#if defined(SOC_MV_ARMADA38X) +#define MV_BOOTROM_MEM_ADDR 0xFFF00000 +#define MV_BOOTROM_WIN_SIZE 0xF +#define MV_CPU_SUBSYS_REGS_LEN 0x100 + +/* Internal Units Sync Barrier Control Register */ +#define MV_SYNC_BARRIER_CTRL 0x84 +#define MV_SYNC_BARRIER_CTRL_ALL 0xFFFF +#endif + #define WIN_REG_IDX_RD(pre,reg,off,base) \ static __inline uint32_t \ pre ## _ ## reg ## _read(int i) \