From owner-p4-projects@FreeBSD.ORG Fri Apr 25 18:22:04 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id A6A8137B407; Fri, 25 Apr 2003 18:22:03 -0700 (PDT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 55B7D37B405 for ; Fri, 25 Apr 2003 18:22:03 -0700 (PDT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id EFE9643FB1 for ; Fri, 25 Apr 2003 18:22:02 -0700 (PDT) (envelope-from peter@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id h3Q1M20U009187 for ; Fri, 25 Apr 2003 18:22:02 -0700 (PDT) (envelope-from peter@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id h3Q1M2xW009180 for perforce@freebsd.org; Fri, 25 Apr 2003 18:22:02 -0700 (PDT) Date: Fri, 25 Apr 2003 18:22:02 -0700 (PDT) Message-Id: <200304260122.h3Q1M2xW009180@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to peter@freebsd.org using -f From: Peter Wemm To: Perforce Change Reviews Subject: PERFORCE change 29755 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 26 Apr 2003 01:22:05 -0000 http://perforce.freebsd.org/chv.cgi?CH=29755 Change 29755 by peter@peter_daintree on 2003/04/25 18:21:54 Add a stub 32 bit 'syscall' entry point so that we can point MSR_CSTAR to it. Note that GUCODE32_SEL exists but does not have the 'p' (present) bit set, so theoretically this is impossible. Affected files ... .. //depot/projects/hammer/sys/x86_64/x86_64/exception.s#31 edit .. //depot/projects/hammer/sys/x86_64/x86_64/machdep.c#86 edit Differences ... ==== //depot/projects/hammer/sys/x86_64/x86_64/exception.s#31 (text+ko) ==== @@ -259,6 +259,14 @@ andq $~PCB_FULLCTX,PCB_FLAGS(%rax) jmp doreti +/* + * Here for CYA insurance, in case a "syscall" instruction gets + * issued from 32 bit compatability mode. MSR_CSTAR has to point + * to *something* if EFER_SCE is enabled. + */ +IDTVEC(fast_syscall32) + sysret + ENTRY(fork_trampoline) movq %r12, %rdi /* function */ movq %rbx, %rsi /* arg1 */ ==== //depot/projects/hammer/sys/x86_64/x86_64/machdep.c#86 (text+ko) ==== @@ -151,7 +151,7 @@ struct kva_md_info kmi; static struct trapframe proc0_tf; -struct pcpu __pcpu; +static struct pcpu __pcpu; struct mtx icu_lock; @@ -653,7 +653,8 @@ IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), - IDTVEC(xmm), IDTVEC(int0x80_syscall), IDTVEC(fast_syscall); + IDTVEC(xmm), IDTVEC(int0x80_syscall), + IDTVEC(fast_syscall), IDTVEC(fast_syscall32); void sdtossd(sd, ssd) @@ -1260,6 +1261,7 @@ msr = rdmsr(MSR_EFER) | EFER_SCE; wrmsr(MSR_EFER, msr); wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); + wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); wrmsr(MSR_STAR, msr);