From owner-svn-src-projects@FreeBSD.ORG Mon Jul 6 07:45:02 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DAEBD10656C1; Mon, 6 Jul 2009 07:45:02 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id CA7488FC1A; Mon, 6 Jul 2009 07:45:02 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n667j2m8072198; Mon, 6 Jul 2009 07:45:02 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n667j249072196; Mon, 6 Jul 2009 07:45:02 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <200907060745.n667j249072196@svn.freebsd.org> From: Warner Losh Date: Mon, 6 Jul 2009 07:45:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r195395 - projects/mips/sys/mips/mips X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Jul 2009 07:45:03 -0000 Author: imp Date: Mon Jul 6 07:45:02 2009 New Revision: 195395 URL: http://svn.freebsd.org/changeset/base/195395 Log: Use ta0 instead of t4 and ta1 instead of t5. These map to the same registers on O32 builds, but t4 and t5 don't exist on N32 or N64. Modified: projects/mips/sys/mips/mips/tlb.S Modified: projects/mips/sys/mips/mips/tlb.S ============================================================================== --- projects/mips/sys/mips/mips/tlb.S Mon Jul 6 07:43:50 2009 (r195394) +++ projects/mips/sys/mips/mips/tlb.S Mon Jul 6 07:45:02 2009 (r195395) @@ -432,17 +432,17 @@ LEAF(Mips_TLBRead) MIPS_CPU_NOP_DELAY mfc0 t2, COP_0_TLB_PG_MASK # fetch the hi entry _MFC0 t3, COP_0_TLB_HI # fetch the hi entry - _MFC0 t4, COP_0_TLB_LO0 # See what we got - _MFC0 t5, COP_0_TLB_LO1 # See what we got + _MFC0 ta0, COP_0_TLB_LO0 # See what we got + _MFC0 ta1, COP_0_TLB_LO1 # See what we got _MTC0 t0, COP_0_TLB_HI # restore PID MIPS_CPU_NOP_DELAY mtc0 v1, COP_0_STATUS_REG # Restore the status register ITLBNOPFIX sw t2, 0(a1) sw t3, 4(a1) - sw t4, 8(a1) + sw ta0, 8(a1) j ra - sw t5, 12(a1) + sw ta1, 12(a1) END(Mips_TLBRead) /*-------------------------------------------------------------------------- @@ -478,7 +478,7 @@ LEAF(mips_TBIAP) mfc0 v1, COP_0_STATUS_REG # save status register mtc0 zero, COP_0_STATUS_REG # disable interrupts - _MFC0 t4, COP_0_TLB_HI # Get current PID + _MFC0 ta0, COP_0_TLB_HI # Get current PID move t2, a0 mfc0 t1, COP_0_TLB_WIRED li v0, MIPS_KSEG0_START # invalid address @@ -517,7 +517,7 @@ LEAF(mips_TBIAP) bne t1, t2, 1b nop - _MTC0 t4, COP_0_TLB_HI # restore PID + _MTC0 ta0, COP_0_TLB_HI # restore PID mtc0 t3, COP_0_TLB_PG_MASK # restore pgMask MIPS_CPU_NOP_DELAY mtc0 v1, COP_0_STATUS_REG # restore status register