From owner-freebsd-arch@FreeBSD.ORG Fri May 9 18:08:36 2014 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9640523F; Fri, 9 May 2014 18:08:36 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 6C945A8; Fri, 9 May 2014 18:08:36 +0000 (UTC) Received: from jhbbsd.localnet (unknown [209.249.190.124]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 5D7BCB99B; Fri, 9 May 2014 14:08:35 -0400 (EDT) From: John Baldwin To: Adrian Chadd Subject: Re: [rfc] bind per-cpu timeout threads to each CPU Date: Fri, 9 May 2014 13:49:14 -0400 User-Agent: KMail/1.13.5 (FreeBSD/8.4-CBSD-20140415; KDE/4.5.5; amd64; ; ) References: <530508B7.7060102@FreeBSD.org> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201405091349.14381.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Fri, 09 May 2014 14:08:35 -0400 (EDT) Cc: Alexander Motin , freebsd-current , "freebsd-arch@freebsd.org" X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 May 2014 18:08:36 -0000 On Thursday, May 08, 2014 11:43:39 pm Adrian Chadd wrote: > Hi, > > I'd like to revisit this now. > > I'd like to commit this stuff as-is and then take some time to revisit > the catch-all softclock from cpu0 swi. It's more complicated than it > needs to be as it just assumes timeout_cpu == cpuid of cpu 0. So > there's no easy way to slide in a new catch-all softclock. > > Once that's done I'd like to then experiment with turning on the pcpu > tcp timer stuff and gluing that into the RSS CPU ID / netisr ID stuff. > > Thanks, To be clear, are you going to commit the change to bind all but CPU 0 to their CPU but let the "default" swi float for now? I think that is fine to commit, but I wouldn't want to bind the "default" swi for now. > -a > > > On 20 February 2014 13:48, Adrian Chadd wrote: > > On 20 February 2014 11:17, John Baldwin wrote: > > > >> (A further variant of this would be to divorce cpu0's swi from the > >> catch-all softclock and let the catch-all softclock float, but bind > >> all the per-cpu swis) > > > > I like this idea. If something (eg per-CPU TCP timers, if it's turned > > on) makes a very specific decision about the CPU then it should be > > fixed. Otherwise a lot of the underlying assumptions for things like > > RSS just aren't guaranteed to hold. > > > > It could also perhaps extend to some abstract pool of CPUs later, if > > we wanted to do things like one flowing swi per socket or whatnot when > > we start booting on 1024 core boxes... > > > > -a > -- John Baldwin