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From: terry@cs.weber.edu (Terry Lambert)
Message-Id: <9506260016.AA13065@cs.weber.edu>
Subject: Re: 2.05R reboot hangs
To: bde@zeta.org.au (Bruce Evans)
Date: Sun, 25 Jun 95 18:16:41 MDT
Cc: wpaul@skynet.ctr.columbia.edu, hackers@freebsd.org,
        rgrimes@gndrsh.aac.dev.com
In-Reply-To: <199506252337.JAA10041@godzilla.zeta.org.au> from "Bruce Evans" at Jun 26, 95 09:37:34 am
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> Disabled?  This seems likely.  The linear reset address is not
> 0xF000:0xFFF0 or whatever I said before; it is actually
> 
> 	%eip      = 0x0000fff0 +
> 	base(%cs) = 0xffff0000
> 	          = 0xfffffff0
> 
> This has A20 and other high bits set, so it works properly iff the ROM
> is shadowed in high memory at all times.  Does GateA20 control A21-31?

I think it wraps continuously instead of just once.  That's a "yes".

The shadowing isn't guaranteed (I don't think).

There is also the (potential) isue of lo core data used in the reset.


					Terry Lambert
					terry@cs.weber.edu
---
Any opinions in this posting are my own and not those of my present
or previous employers.