From owner-svn-src-all@FreeBSD.ORG Fri Mar 29 06:32:02 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id EAA1AF44; Fri, 29 Mar 2013 06:32:02 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id DDCCFE33; Fri, 29 Mar 2013 06:32:02 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r2T6W2vI076182; Fri, 29 Mar 2013 06:32:02 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r2T6W2bA076181; Fri, 29 Mar 2013 06:32:02 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201303290632.r2T6W2bA076181@svn.freebsd.org> From: Adrian Chadd Date: Fri, 29 Mar 2013 06:32:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r248866 - head/sys/mips/atheros X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Mar 2013 06:32:03 -0000 Author: adrian Date: Fri Mar 29 06:32:02 2013 New Revision: 248866 URL: http://svnweb.freebsd.org/changeset/base/248866 Log: * Fix clock register definitions * Add maximum clock register values Modified: head/sys/mips/atheros/ar933x_uart.h Modified: head/sys/mips/atheros/ar933x_uart.h ============================================================================== --- head/sys/mips/atheros/ar933x_uart.h Fri Mar 29 06:31:31 2013 (r248865) +++ head/sys/mips/atheros/ar933x_uart.h Fri Mar 29 06:32:02 2013 (r248866) @@ -68,10 +68,13 @@ #define AR933X_UART_CS_TX_BUSY (1 << 14) #define AR933X_UART_CS_RX_BUSY (1 << 15) -#define AR933X_UART_CLOCK_STEP_M 0xffff -#define AR933X_UART_CLOCK_SCALE_M 0xfff +#define AR933X_UART_CLOCK_SCALE_M 0xff #define AR933X_UART_CLOCK_SCALE_S 16 #define AR933X_UART_CLOCK_STEP_M 0xffff +#define AR933X_UART_CLOCK_STEP_S 0 + +#define AR933X_UART_MAX_SCALE 0xff +#define AR933X_UART_MAX_STEP 0xffff #define AR933X_UART_INT_RX_VALID (1 << 0) #define AR933X_UART_INT_TX_READY (1 << 1)