From owner-svn-src-projects@FreeBSD.ORG Tue Jan 20 04:31:12 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BC84410656F3; Tue, 20 Jan 2009 04:31:12 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 925538FC1A; Tue, 20 Jan 2009 04:31:12 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n0K4VCxX032611; Tue, 20 Jan 2009 04:31:12 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n0K4VCoT032609; Tue, 20 Jan 2009 04:31:12 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <200901200431.n0K4VCoT032609@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Tue, 20 Jan 2009 04:31:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r187462 - projects/mips/sys/mips/atheros X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Jan 2009 04:31:13 -0000 Author: gonzo Date: Tue Jan 20 04:31:12 2009 New Revision: 187462 URL: http://svn.freebsd.org/changeset/base/187462 Log: - Use more generic prefix for register names (ATH instead of AR71XX Modified: projects/mips/sys/mips/atheros/ar71xxreg.h projects/mips/sys/mips/atheros/uart_cpu_ar71xx.c Modified: projects/mips/sys/mips/atheros/ar71xxreg.h ============================================================================== --- projects/mips/sys/mips/atheros/ar71xxreg.h Tue Jan 20 04:24:03 2009 (r187461) +++ projects/mips/sys/mips/atheros/ar71xxreg.h Tue Jan 20 04:31:12 2009 (r187462) @@ -26,11 +26,32 @@ #ifndef _AR71XX_REG_H_ #define _AR71XX_REG_H_ -#define AR71XX_UART_ADDR 0x18020000 +#define ATH_READ_REG(reg) \ + *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) -#define AR71XX_RST_RESET 0x18060024 +#define ATH_WRITE_REG(reg, val) \ + *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) = (val) + +#define ATH_UART_ADDR 0x18020000 + +/* APB registers */ +/* + * APB interrupt status and mask register and interrupt bit numbers for + */ +#define ATH_MISC_INTR_STATUS 0x18060010 +#define ATH_MISC_INTR_MASK 0x18060014 +#define ATH_INT_MISC_TIMER 0 +#define ATH_INT_MISC_ERROR 1 +#define ATH_INT_MISC_GPIO 2 +#define ATH_INT_MISC_UART 3 +#define ATH_INT_MISC_WATCHDOG 4 +#define ATH_INT_MISC_PERF 5 +#define ATH_INT_MISC_OHCI 6 +#define ATH_INT_MISC_DMA 7 + + +#define ATH_RST_RESET 0x18060024 #define RST_RESET_CPU_COLD_RESET (1 << 20) /* Cold reset */ #define RST_RESET_FULL_CHIP_RESET (1 << 24) /* Same as pulling the reset pin */ - #endif /* _AR71XX_REG_H_ */ Modified: projects/mips/sys/mips/atheros/uart_cpu_ar71xx.c ============================================================================== --- projects/mips/sys/mips/atheros/uart_cpu_ar71xx.c Tue Jan 20 04:24:03 2009 (r187461) +++ projects/mips/sys/mips/atheros/uart_cpu_ar71xx.c Tue Jan 20 04:31:12 2009 (r187462) @@ -65,7 +65,7 @@ uart_cpu_getdev(int devtype, struct uart /* Bad MIPS, no IO for MIPS */ uart_bus_space_io = 0; - uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3; - di->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3; + uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(ATH_UART_ADDR) + 3; + di->bas.bsh = MIPS_PHYS_TO_KSEG1(ATH_UART_ADDR) + 3; return (0); }