Date: Thu, 5 Oct 2023 15:35:10 GMT From: Emmanuel Vadot <manu@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 363b7c39fbad - main - dwc: Move the dma reset code in dwc1000_dma.c Message-ID: <202310051535.395FZAkY012891@gitrepo.freebsd.org>
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The branch main has been updated by manu: URL: https://cgit.FreeBSD.org/src/commit/?id=363b7c39fbad7c03f46e24bb4e435fad5cb56aa7 commit 363b7c39fbad7c03f46e24bb4e435fad5cb56aa7 Author: Emmanuel Vadot <manu@FreeBSD.org> AuthorDate: 2023-10-04 05:55:11 +0000 Commit: Emmanuel Vadot <manu@FreeBSD.org> CommitDate: 2023-10-05 15:34:40 +0000 dwc: Move the dma reset code in dwc1000_dma.c No functional changes intended --- sys/dev/dwc/dwc1000_core.h | 1 + sys/dev/dwc/dwc1000_dma.c | 24 +++++++++++++++++++++++- sys/dev/dwc/dwc1000_dma.h | 1 + sys/dev/dwc/if_dwc.c | 21 +++++---------------- 4 files changed, 30 insertions(+), 17 deletions(-) diff --git a/sys/dev/dwc/dwc1000_core.h b/sys/dev/dwc/dwc1000_core.h index cb7d1f3946e9..ade5270e25b1 100644 --- a/sys/dev/dwc/dwc1000_core.h +++ b/sys/dev/dwc/dwc1000_core.h @@ -34,6 +34,7 @@ int dwc1000_miibus_read_reg(device_t dev, int phy, int reg); int dwc1000_miibus_write_reg(device_t dev, int phy, int reg, int val); void dwc1000_miibus_statchg(device_t dev); void dwc1000_core_setup(struct dwc_softc *sc); +int dwc1000_core_reset(struct dwc_softc *sc); void dwc1000_enable_mac(struct dwc_softc *sc, bool enable); void dwc1000_enable_csum_offload(struct dwc_softc *sc); void dwc1000_setup_rxfilter(struct dwc_softc *sc); diff --git a/sys/dev/dwc/dwc1000_dma.c b/sys/dev/dwc/dwc1000_dma.c index cdfd24afd574..25916404bb63 100644 --- a/sys/dev/dwc/dwc1000_dma.c +++ b/sys/dev/dwc/dwc1000_dma.c @@ -61,7 +61,7 @@ #include <dev/dwc/dwc1000_dma.h> #define WATCHDOG_TIMEOUT_SECS 5 - +#define DMA_RESET_TIMEOUT 100 /* TX descriptors - TDESC0 is almost unified */ #define TDESC0_OWN (1U << 31) @@ -598,6 +598,28 @@ dma1000_stop(struct dwc_softc *sc) WRITE4(sc, OPERATION_MODE, reg); } +int +dma1000_reset(struct dwc_softc *sc) +{ + uint32_t reg; + int i; + + reg = READ4(sc, BUS_MODE); + reg |= (BUS_MODE_SWR); + WRITE4(sc, BUS_MODE, reg); + + for (i = 0; i < DMA_RESET_TIMEOUT; i++) { + if ((READ4(sc, BUS_MODE) & BUS_MODE_SWR) == 0) + break; + DELAY(10); + } + if (i >= DMA_RESET_TIMEOUT) { + return (ENXIO); + } + + return (0); +} + /* * Create the bus_dma resources */ diff --git a/sys/dev/dwc/dwc1000_dma.h b/sys/dev/dwc/dwc1000_dma.h index 96a98c2d6d51..f0d22a67617f 100644 --- a/sys/dev/dwc/dwc1000_dma.h +++ b/sys/dev/dwc/dwc1000_dma.h @@ -46,6 +46,7 @@ int dma1000_init(struct dwc_softc *sc); void dma1000_free(struct dwc_softc *sc); void dma1000_start(struct dwc_softc *sc); void dma1000_stop(struct dwc_softc *sc); +int dma1000_reset(struct dwc_softc *sc); int dma1000_setup_txbuf(struct dwc_softc *sc, int idx, struct mbuf **mp); void dma1000_txfinish_locked(struct dwc_softc *sc); void dma1000_rxfinish_locked(struct dwc_softc *sc); diff --git a/sys/dev/dwc/if_dwc.c b/sys/dev/dwc/if_dwc.c index 0df99a7c205c..a3ce32c95cb9 100644 --- a/sys/dev/dwc/if_dwc.c +++ b/sys/dev/dwc/if_dwc.c @@ -78,8 +78,6 @@ #include "gpio_if.h" #include "miibus_if.h" -#define MAC_RESET_TIMEOUT 100 - static struct resource_spec dwc_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, { SYS_RES_IRQ, 0, RF_ACTIVE }, @@ -499,7 +497,7 @@ dwc_attach(device_t dev) uint8_t macaddr[ETHER_ADDR_LEN]; struct dwc_softc *sc; if_t ifp; - int error, i; + int error; uint32_t reg; uint32_t txpbl, rxpbl, pbl; bool nopblx8 = false; @@ -581,19 +579,10 @@ dwc_attach(device_t dev) } /* Reset */ - reg = READ4(sc, BUS_MODE); - reg |= (BUS_MODE_SWR); - WRITE4(sc, BUS_MODE, reg); - - for (i = 0; i < MAC_RESET_TIMEOUT; i++) { - if ((READ4(sc, BUS_MODE) & BUS_MODE_SWR) == 0) - break; - DELAY(10); - } - if (i >= MAC_RESET_TIMEOUT) { - device_printf(sc->dev, "Can't reset DWC.\n"); - bus_release_resources(dev, dwc_spec, sc->res); - return (ENXIO); + if ((error = dma1000_reset(sc)) != 0) { + device_printf(sc->dev, "Can't reset DMA controller.\n"); + bus_release_resources(sc->dev, dwc_spec, sc->res); + return (error); } reg = BUS_MODE_USP;
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