From owner-svn-src-all@FreeBSD.ORG Wed Mar 10 20:22:58 2010 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4984F106564A; Wed, 10 Mar 2010 20:22:58 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 393DE8FC19; Wed, 10 Mar 2010 20:22:58 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o2AKMwR5052255; Wed, 10 Mar 2010 20:22:58 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o2AKMwvX052253; Wed, 10 Mar 2010 20:22:58 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <201003102022.o2AKMwvX052253@svn.freebsd.org> From: Pyun YongHyeon Date: Wed, 10 Mar 2010 20:22:58 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r204975 - head/sys/dev/bge X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2010 20:22:58 -0000 Author: yongari Date: Wed Mar 10 20:22:57 2010 New Revision: 204975 URL: http://svn.freebsd.org/changeset/base/204975 Log: Enable hardware fixes for BCM5704 B0 as recommended by data sheet. Modified: head/sys/dev/bge/if_bge.c Modified: head/sys/dev/bge/if_bge.c ============================================================================== --- head/sys/dev/bge/if_bge.c Wed Mar 10 19:55:48 2010 (r204974) +++ head/sys/dev/bge/if_bge.c Wed Mar 10 20:22:57 2010 (r204975) @@ -1342,6 +1342,7 @@ static int bge_chipinit(struct bge_softc *sc) { uint32_t dma_rw_ctl; + uint16_t val; int i; /* Set endianness before we access any non-PCI registers. */ @@ -1362,6 +1363,17 @@ bge_chipinit(struct bge_softc *sc) i < BGE_STATUS_BLOCK_END + 1; i += sizeof(uint32_t)) BGE_MEMWIN_WRITE(sc, i, 0); + if (sc->bge_chiprev == BGE_CHIPREV_5704_BX) { + /* + * Fix data corruption casued by non-qword write with WB. + * Fix master abort in PCI mode. + * Fix PCI latency timer. + */ + val = pci_read_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, 2); + val |= (1 << 10) | (1 << 12) | (1 << 13); + pci_write_config(sc->bge_dev, BGE_PCI_MSI_DATA + 2, val, 2); + } + /* * Set up the PCI DMA control register. */