From owner-svn-src-all@FreeBSD.ORG Fri May 15 19:19:32 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1BBF91065673 for ; Fri, 15 May 2009 19:19:32 +0000 (UTC) (envelope-from stas@FreeBSD.org) Received: from mx0.deglitch.com (backbone.deglitch.com [IPv6:2001:16d8:fffb:4::abba]) by mx1.freebsd.org (Postfix) with ESMTP id 912C88FC23 for ; Fri, 15 May 2009 19:19:31 +0000 (UTC) (envelope-from stas@FreeBSD.org) Received: from DSPAM-Daemon (localhost [127.0.0.1]) by mx0.deglitch.com (Postfix) with SMTP id DBD6A8FC52 for ; Fri, 15 May 2009 23:19:29 +0400 (MSD) Received: from localhost (dhcp170-225-red.yandex.net [95.108.170.225]) by mx0.deglitch.com (Postfix) with ESMTPSA id 8D0DE8FC1D; Fri, 15 May 2009 23:19:24 +0400 (MSD) Date: Fri, 15 May 2009 23:19:22 +0400 From: Stanislav Sedov To: "M. Warner Losh" Message-Id: <20090515231922.fb760af4.stas@FreeBSD.org> In-Reply-To: <20090515.090531.932035381.imp@bsdimp.com> References: <20090515092205.6f6d06fa.stas@FreeBSD.org> <20090514.233536.1299798630.imp@bsdimp.com> <20090515141642.ebc06b59.stas@FreeBSD.org> <20090515.090531.932035381.imp@bsdimp.com> Organization: The FreeBSD Project X-Mailer: Sylpheed 2.6.0 (GTK+ 2.16.1; amd64-portbld-freebsd7.2) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-DSPAM-Result: Whitelisted X-DSPAM-Processed: Fri May 15 23:19:29 2009 X-DSPAM-Confidence: 0.9899 X-DSPAM-Improbability: 1 in 9809 chance of being spam X-DSPAM-Probability: 0.0000 X-DSPAM-Signature: 4a0dc041994294531918519 Cc: stas@freebsd.org, svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r192027 - head/sys/arm/at91 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 May 2009 19:19:32 -0000 On Fri, 15 May 2009 09:05:31 -0600 (MDT) "M. Warner Losh" mentioned: > In message: <20090515141642.ebc06b59.stas@FreeBSD.org> > Stanislav Sedov writes: > : On Thu, 14 May 2009 23:35:36 -0600 (MDT) > : "M. Warner Losh" mentioned: > : > : > In message: <20090515092205.6f6d06fa.stas@FreeBSD.org> > : > Stanislav Sedov writes: > : > : On Thu, 14 May 2009 21:37:12 -0600 (MDT) > : > : "M. Warner Losh" mentioned: > : > : > : > : > In message: <200905122114.n4CLEag9033208@svn.freebsd.org> > : > : > Stanislav Sedov writes: > : > : > : @@ -926,6 +937,7 @@ atestart_locked(struct ifnet *ifp) > : > : > : * tell the hardware to xmit the packet. > : > : > : */ > : > : > : WR4(sc, ETH_TAR, segs[0].ds_addr); > : > : > : + BARRIER(sc, ETH_TAR, 8, BUS_SPACE_BARRIER_WRITE); > : > : > : WR4(sc, ETH_TCR, segs[0].ds_len); > : > : > > : > : > Why is a barrier needed here? > : > : > > : > : Writing the TCR register triggers the transmit, so it had to be written > : > : strongly after the TAR register. That's why I added the barrier here. > : > > : > Then shouldn't the barrier be after TCR write? Or does this ensure > : > that the write is before TCR? > : > > : > : Yeah, this barrier is to ensure that the TCR register gets written after the > : TAR register has been written, not before. I don't think an additional barrier > : is needed after the TCR write. > > Did this fix an observed bug, or is it theoretical? None of Atmel's > code does this, but maybe we turn on some flag that reorders writes. > On the other hand, I've seen some minor flakiness from time to time > that could be explained by reordering.... > > There's likely a bunch of other places where something like this may > be needed. The PDC has size/address information, followed by an > enable bit. The MCI device has some similar weirdness as well... > I don't think there're any reordering possible on at91 platform, though I need to check first. The bus_space_barrier call is currently a no-op on arm platforms, so this modifications were mostly to make the code more correct theoretically then fixing any possible real-world issues. PDC is the entirely another thing, so it need to be checked separately. EMAC doesn't use PDC but a real DMA implementation. -- Stanislav Sedov ST4096-RIPE !DSPAM:4a0dc041994294531918519!