From owner-freebsd-hackers Mon Jun 2 00:44:19 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.5/8.8.5) id AAA05049 for hackers-outgoing; Mon, 2 Jun 1997 00:44:19 -0700 (PDT) Received: from seagull.rtd.com (seagull.rtd.com [198.102.68.2]) by hub.freebsd.org (8.8.5/8.8.5) with ESMTP id AAA05044 for ; Mon, 2 Jun 1997 00:44:17 -0700 (PDT) Received: (from dgy@localhost) by seagull.rtd.com (8.7.5/8.7.3) id AAA22062; Mon, 2 Jun 1997 00:44:10 -0700 (MST) From: Don Yuniskis Message-Id: <199706020744.AAA22062@seagull.rtd.com> Subject: Re: diskless hardware *design* suggestions To: msmith@atrad.adelaide.edu.au (Michael Smith) Date: Mon, 2 Jun 1997 00:44:10 -0700 (MST) Cc: dgy@rtd.com, msmith@atrad.adelaide.edu.au, freebsd-hackers@freefall.FreeBSD.org In-Reply-To: <199706020704.QAA19821@genesis.atrad.adelaide.edu.au> from "Michael Smith" at Jun 2, 97 04:34:26 pm X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-hackers@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk It seems that Michael Smith said: > Don Yuniskis stands accused of saying: > > > > Yes. But, to be honest, I haven't looked at it in detail > > as it's pretty minimalist (the SC400 is intended for use in > > high end PDA's, etc. driving an LCD/pen interface). Use > > of the display controller requires you to give up the 32bit > > databus in favor of 16... > > Ah, understood. Amazing that Motorola have had dynamic bus sizing for > the last decade or more... Problem isn't related to bus sizing but, rather, the typical "not enough pins" syndrome experienced by most MCU's. It's a BGA292 and, by the time you discount all the power, ground, DMA, Serial, DRAM controller, etc. pins, you're faced with "do I want keyboard scanning and display controller or wider data bus" :> Since it's just a "curmmy" LCD controller and I don;t have a keypad to scan (can always do that myself, thankyouverymuch!), it seems like the wider data bus is the WIN! > > > > Yes. Those NIC's that support DMA tend to be bus-mastering > > > > themselves -- hence my problem! > > > > > > The Crystal parts do slave DMA, but that's generally too slow to be useful. > > > > If they'll push 32 bits at a time and aren't limited by things like > > the ISA "standard" DMA rates, that could be quite usable since it > > would eliminate the need for a separate buffer memory, etc. > > No, they are ISA devices, and as such are 16-bit only. Ahh, :-( > > I'm suspecting that 1MB/s is probably less than ideal for some of the > > applications I have in mind. I'd like to nail down the network > > interface "once and for all" and not have to redesign it later, > > etc. AMD's SuperNet2 parts look attractive but that's a sizeable > > investment in silicon and driver development (and *definitely* > > gobbles up too much real estate). I was hoping a 10Base2 > > solution would be *very* appealing and keep me from digging > > into some of the other options... (hmmm... what's that? > > "Design by laziness"?? :>) > > Well, if 1M/sec is too slow, have you actually sized your throughput > requirements, or are you just going on "feel"? 8) Trying to leverage one design to handle several different applications (too expensive to turn the crank again for other designs). So, aiming for the heaviest demands seems to be the way to go -- and let the smaller projects just incur some extra costs... Thx! --don