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From: Adrian Chadd <adrian@FreeBSD.org>
Date: Sun, 20 Mar 2011 09:08:45 +0000 (UTC)
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Subject: cvs commit: src/sys/dev/ath/ath_hal/ar5416 ar5416_cal.c
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adrian      2011-03-20 09:08:45 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/ath/ath_hal/ar5416 ar5416_cal.c 
  Log:
  SVN rev 219794 on 2011-03-20 09:08:45Z by adrian
  
  Cave in and disable the ADC DC gain/offset calibrations if they're
  not needed.
  
  These calibrations are only applicable if the chip operating mode
  engages both interleaved RX ADCs (ie, it's compensating for the
  differences in DC gain and DC offset -between- the two ADCs.)
  Otherwise the chip reads values of 0x0 for the secondary ADC
  (as I guess it's not enabled here) and thus writes potentially
  bogus info into the chip.
  
  I've tested this on the AR9160 and AR9280; both behave themselves
  in 11g mode with these calibrations disabled.
  
  Revision  Changes    Path
  1.20      +6 -3      src/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c