From owner-svn-src-all@FreeBSD.ORG Fri Dec 5 15:27:28 2008 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7237E1065673; Fri, 5 Dec 2008 15:27:28 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 613788FC22; Fri, 5 Dec 2008 15:27:28 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id mB5FRS85058736; Fri, 5 Dec 2008 15:27:28 GMT (envelope-from raj@svn.freebsd.org) Received: (from raj@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id mB5FRSn4058735; Fri, 5 Dec 2008 15:27:28 GMT (envelope-from raj@svn.freebsd.org) Message-Id: <200812051527.mB5FRSn4058735@svn.freebsd.org> From: Rafal Jaworowski Date: Fri, 5 Dec 2008 15:27:28 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r185639 - head/sys/arm/mv X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Dec 2008 15:27:28 -0000 Author: raj Date: Fri Dec 5 15:27:28 2008 New Revision: 185639 URL: http://svn.freebsd.org/changeset/base/185639 Log: Fix configuration of the PCI bridge. This got omitted in the initial import of this code. Modified: head/sys/arm/mv/mv_pci.c Modified: head/sys/arm/mv/mv_pci.c ============================================================================== --- head/sys/arm/mv/mv_pci.c Fri Dec 5 15:26:19 2008 (r185638) +++ head/sys/arm/mv/mv_pci.c Fri Dec 5 15:27:28 2008 (r185639) @@ -598,6 +598,10 @@ pcib_mbus_init_bridge(struct pcib_mbus_s mem_limit = mem_base + sc->sc_info->op_mem_size - 1; /* Configure I/O decode registers */ + pcib_mbus_write_config(sc->sc_dev, bus, slot, func, PCIR_IOBASEL_1, + io_base >> 8, 1); + pcib_mbus_write_config(sc->sc_dev, bus, slot, func, PCIR_IOBASEH_1, + io_base >> 16, 2); pcib_mbus_write_config(sc->sc_dev, bus, slot, func, PCIR_IOLIMITL_1, io_limit >> 8, 1); pcib_mbus_write_config(sc->sc_dev, bus, slot, func, PCIR_IOLIMITH_1,