From owner-svn-src-head@freebsd.org Sat Aug 22 03:29:13 2015 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E376E9BF232; Sat, 22 Aug 2015 03:29:13 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BAAA712B6; Sat, 22 Aug 2015 03:29:13 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.70]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id t7M3TD1w047546; Sat, 22 Aug 2015 03:29:13 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id t7M3TDdr047544; Sat, 22 Aug 2015 03:29:13 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201508220329.t7M3TDdr047544@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Sat, 22 Aug 2015 03:29:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r287011 - head/sys/powerpc/mpc85xx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 22 Aug 2015 03:29:14 -0000 Author: jhibbits Date: Sat Aug 22 03:29:12 2015 New Revision: 287011 URL: https://svnweb.freebsd.org/changeset/base/287011 Log: Make the mpc85xx platform a kobj base class. Summary: Some systems are based around mpc85xx, but need special initialization. By making the mpc85xx platform a base class, these systems can be platform subclasses, and perform board-specific initialization in addition to the mpc85xx initialization. Test Plan: Tested on my RB800. A platform class was created, and will be committed separately. Reviewed By: nwhitehorn Differential Revision: https://reviews.freebsd.org/D3305 Modified: head/sys/powerpc/mpc85xx/mpc85xx.h head/sys/powerpc/mpc85xx/platform_mpc85xx.c Modified: head/sys/powerpc/mpc85xx/mpc85xx.h ============================================================================== --- head/sys/powerpc/mpc85xx/mpc85xx.h Sat Aug 22 00:47:05 2015 (r287010) +++ head/sys/powerpc/mpc85xx/mpc85xx.h Sat Aug 22 03:29:12 2015 (r287011) @@ -30,6 +30,8 @@ #ifndef _MPC85XX_H_ #define _MPC85XX_H_ +#include + /* * Configuration control and status registers */ @@ -84,4 +86,7 @@ int law_disable(int trgt, u_long addr, u int law_getmax(void); int law_pci_target(struct resource *, int *, int *); +DECLARE_CLASS(mpc85xx_platform); +int mpc85xx_attach(platform_t); + #endif /* _MPC85XX_H_ */ Modified: head/sys/powerpc/mpc85xx/platform_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/platform_mpc85xx.c Sat Aug 22 00:47:05 2015 (r287010) +++ head/sys/powerpc/mpc85xx/platform_mpc85xx.c Sat Aug 22 03:29:12 2015 (r287011) @@ -71,7 +71,6 @@ vm_offset_t ccsrbar_va; static int cpu, maxcpu; static int mpc85xx_probe(platform_t); -static int mpc85xx_attach(platform_t); static void mpc85xx_mem_regions(platform_t, struct mem_region *phys, int *physsz, struct mem_region *avail, int *availsz); static u_long mpc85xx_timebase_freq(platform_t, struct cpuref *cpuref); @@ -98,11 +97,7 @@ static platform_method_t mpc85xx_methods PLATFORMMETHOD_END }; -static platform_def_t mpc85xx_platform = { - "mpc85xx", - mpc85xx_methods, - 0 -}; +DEFINE_CLASS_0(mpc85xx, mpc85xx_platform, mpc85xx_methods, 0); PLATFORM_DEF(mpc85xx_platform); @@ -117,7 +112,7 @@ mpc85xx_probe(platform_t plat) return (ENXIO); } -static int +int mpc85xx_attach(platform_t plat) { phandle_t cpus, child, ccsr;