Date: Thu, 13 Jan 2022 10:12:31 +0200 From: Andriy Gapon <avg@FreeBSD.org> To: FreeBSD Hackers <freebsd-hackers@FreeBSD.org> Subject: Re: IO-APIC interrupt delivery mode on Ryzen Message-ID: <54e5f61c-64fd-0ebf-c3cd-d4a7a4cbb7e7@FreeBSD.org> In-Reply-To: <c0a41342-4480-76e7-8aad-98a007fb7b88@FreeBSD.org> References: <c0a41342-4480-76e7-8aad-98a007fb7b88@FreeBSD.org>
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On 14/02/2018 09:16, Andriy Gapon wrote: > > A while ago I discovered that all AMD IO-APICs (in separate southbridges and in > FCHs) had a bug with respect to how the interrupt delivery mode got interpreted. > I am curious if the problem has been fixed in Ryzen or if it is being carried on. > > I would appreciate any help with testing that. > > The discussion of the problem and the tests I used can be found in this thread: > https://mail.coreboot.org/pipermail/coreboot/2016-October/082148.html > https://mail.coreboot.org/pipermail/coreboot/2016-October/082156.html > > If you are interested and it's not really clear how to conduct a test, please > write me. FWIW, Ryzen IO-APICs do not have the problem. They interpret the delivery mode according to the APIC specification, not the HyperTransport one. -- Andriy Gapon
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