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Date:      Thu, 5 Sep 2002 10:35:10 -0400 (EDT)
From:      Andrew Gallatin <gallatin@cs.duke.edu>
To:        ticso@cicely.de
Cc:        John Baldwin <jhb@FreeBSD.ORG>, freebsd-alpha@FreeBSD.ORG
Subject:   Re: alpha performance on -current
Message-ID:  <15735.27550.588643.958037@grasshopper.cs.duke.edu>
In-Reply-To: <20020905084824.GJ87724@cicely5.cicely.de>
References:  <XFMail.20020904090455.jhb@FreeBSD.org> <15734.29725.515274.183629@grasshopper.cs.duke.edu> <20020904223255.GI87724@cicely5.cicely.de> <15734.39976.326598.176742@grasshopper.cs.duke.edu> <20020905084824.GJ87724@cicely5.cicely.de>

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Bernd Walter writes:
 > > with MB:
 > >      8699.25 real      6985.64 user      1379.72 sys
 > > 
 > > without MB:
 > >      8298.44 real      7010.03 user       969.02 sys
 > 
 > Would be insteresting what happens if you remove only the obsolete
 > barriers.

The lmbench perf is just the same as with the wrongheaded way I was
doing it earlier -- 1.6us with kern.giant.proc=1, and 1.4us with
kern.giant.proc=0.  To refresh, it is 2.0/1.6 with the stock code.

I'm starting a buildworld now.


 > What is required is the following:
 > ...
 > /* acq */
 > atomic (locked) memory access
 > mb
 > ...
 > /* rel */
 > mb
 > atomic (locked) memory access
 > ...
 > 
 > But what we currently have is
 > ...
 > /* acq */
 > atomic (locked) memory access
 > mb
 > mb
 > ...
 > /* rel */
 > mb
 > atomic (locked) memory access
 > mb

I'm using the appended diff, which I think is what you're suggesting:

Cheers,

Drew

Index: atomic.h
===================================================================
RCS file: /home/ncvs/src/sys/alpha/include/atomic.h,v
retrieving revision 1.14
diff -u -r1.14 atomic.h
--- atomic.h	17 May 2002 05:45:39 -0000	1.14
+++ atomic.h	5 Sep 2002 14:08:50 -0000
@@ -416,35 +416,61 @@
 static __inline u_int32_t
 atomic_cmpset_acq_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
 {
-	int retval;
-
-	retval = atomic_cmpset_32(p, cmpval, newval);
-	alpha_mb();
-	return (retval);
+	return (atomic_cmpset_32(p, cmpval, newval));
 }
 
 static __inline u_int32_t
 atomic_cmpset_rel_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
 {
+	u_int32_t ret;
+
 	alpha_mb();
-	return (atomic_cmpset_32(p, cmpval, newval));
+	__asm __volatile (
+		"1:\tldl_l %0, %4\n\t"		/* load old value */
+		"cmpeq %0, %2, %0\n\t"		/* compare */
+		"beq %0, 2f\n\t"		/* exit if not equal */
+		"mov %3, %0\n\t"		/* value to store */
+		"stl_c %0, %1\n\t"		/* attempt to store */
+		"beq %0, 3f\n\t"		/* if it failed, spin */
+		"2:\n"				/* done */
+		".section .text3,\"ax\"\n"	/* improve branch prediction */
+		"3:\tbr 1b\n"			/* try again */
+		".previous\n"
+		: "=&r" (ret), "=m" (*p)
+		: "r" ((long)(int)cmpval), "r" (newval), "m" (*p)
+		: "memory");
+
+	return ret;
 }
 
 static __inline u_int64_t
 atomic_cmpset_acq_64(volatile u_int64_t *p, u_int64_t cmpval, u_int64_t newval)
 {
-	int retval;
-
-	retval = atomic_cmpset_64(p, cmpval, newval);
-	alpha_mb();
-	return (retval);
+	return (atomic_cmpset_64(p, cmpval, newval));
 }
 
 static __inline u_int64_t
 atomic_cmpset_rel_64(volatile u_int64_t *p, u_int64_t cmpval, u_int64_t newval)
 {
+	u_int64_t ret;
+
 	alpha_mb();
-	return (atomic_cmpset_64(p, cmpval, newval));
+	__asm __volatile (
+		"1:\tldq_l %0, %4\n\t"		/* load old value */
+		"cmpeq %0, %2, %0\n\t"		/* compare */
+		"beq %0, 2f\n\t"		/* exit if not equal */
+		"mov %3, %0\n\t"		/* value to store */
+		"stq_c %0, %1\n\t"		/* attempt to store */
+		"beq %0, 3f\n\t"		/* if it failed, spin */
+		"2:\n"				/* done */
+		".section .text3,\"ax\"\n"	/* improve branch prediction */
+		"3:\tbr 1b\n"			/* try again */
+		".previous\n"
+		: "=&r" (ret), "=m" (*p)
+		: "r" (cmpval), "r" (newval), "m" (*p)
+		: "memory");
+
+	return ret;
 }
 
 #define	atomic_cmpset_acq_int	atomic_cmpset_acq_32

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