From owner-svn-src-head@FreeBSD.ORG Tue Apr 29 17:48:58 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 4599D2C2; Tue, 29 Apr 2014 17:48:58 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 252EC348; Tue, 29 Apr 2014 17:48:58 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s3THmweN055666; Tue, 29 Apr 2014 17:48:58 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s3THmvKg055662; Tue, 29 Apr 2014 17:48:57 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201404291748.s3THmvKg055662@svn.freebsd.org> From: Ian Lepore Date: Tue, 29 Apr 2014 17:48:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r265099 - in head/sys/arm: conf xilinx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 29 Apr 2014 17:48:58 -0000 Author: ian Date: Tue Apr 29 17:48:57 2014 New Revision: 265099 URL: http://svnweb.freebsd.org/changeset/base/265099 Log: Add SMP support for Zedboard. Submitted by: Thomas Skibo Added: head/sys/arm/xilinx/zy7_mp.c (contents, props changed) Modified: head/sys/arm/conf/ZEDBOARD head/sys/arm/xilinx/files.zynq7 head/sys/arm/xilinx/std.zynq7 Modified: head/sys/arm/conf/ZEDBOARD ============================================================================== --- head/sys/arm/conf/ZEDBOARD Tue Apr 29 17:22:29 2014 (r265098) +++ head/sys/arm/conf/ZEDBOARD Tue Apr 29 17:48:57 2014 (r265099) @@ -56,6 +56,7 @@ options SYSVSEM # SYSV-style semaphor options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions options FREEBSD_BOOT_LOADER options VFP # vfp/neon +options SMP # Symmetric MultiProcessor Kernel # Debugging makeoptions DEBUG=-g Modified: head/sys/arm/xilinx/files.zynq7 ============================================================================== --- head/sys/arm/xilinx/files.zynq7 Tue Apr 29 17:22:29 2014 (r265098) +++ head/sys/arm/xilinx/files.zynq7 Tue Apr 29 17:48:57 2014 (r265099) @@ -21,6 +21,7 @@ arm/xilinx/zy7_l2cache.c standard arm/xilinx/zy7_bus_space.c standard arm/xilinx/zy7_slcr.c standard arm/xilinx/zy7_devcfg.c standard +arm/xilinx/zy7_mp.c optional smp dev/cadence/if_cgem.c optional if_cgem dev/sdhci/sdhci_fdt.c optional sdhci Modified: head/sys/arm/xilinx/std.zynq7 ============================================================================== --- head/sys/arm/xilinx/std.zynq7 Tue Apr 29 17:22:29 2014 (r265098) +++ head/sys/arm/xilinx/std.zynq7 Tue Apr 29 17:48:57 2014 (r265099) @@ -20,3 +20,5 @@ makeoptions KERNVIRTADDR=0xc0100000 options ARM_L2_PIPT +options IPI_IRQ_START=0 +options IPI_IRQ_END=15 Added: head/sys/arm/xilinx/zy7_mp.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/xilinx/zy7_mp.c Tue Apr 29 17:48:57 2014 (r265099) @@ -0,0 +1,99 @@ +/*- + * Copyright (c) 2013 Thomas Skibo. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#define ZYNQ7_CPU1_ENTRY 0xfffffff0 + +void +platform_mp_init_secondary(void) +{ + + gic_init_secondary(); +} + +void +platform_mp_setmaxid(void) +{ + + mp_maxid = 1; +} + +int +platform_mp_probe(void) +{ + + mp_ncpus = 2; + return (1); +} + +void +platform_mp_start_ap(void) +{ + bus_space_handle_t ocm_handle; + + /* Map in magic location to give entry address to CPU1. */ + if (bus_space_map(fdtbus_bs_tag, ZYNQ7_CPU1_ENTRY, 4, + 0, &ocm_handle) != 0) + panic("platform_mp_start_ap: Couldn't map OCM\n"); + + /* Write start address for CPU1. */ + bus_space_write_4(fdtbus_bs_tag, ocm_handle, 0, + pmap_kextract((vm_offset_t)mpentry)); + + /* + * The SCU is enabled by the BOOTROM but I think the second CPU doesn't + * turn on filtering until after the wake-up below. I think that's why + * things don't work if I don't put these cache ops here. Also, the + * magic location, 0xfffffff0, isn't in the SCU's filtering range so it + * needs a write-back too. + */ + cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); + + /* Wake up CPU1. */ + armv7_sev(); + + bus_space_unmap(fdtbus_bs_tag, ocm_handle, 4); +} + +void +platform_ipi_send(cpuset_t cpus, u_int ipi) +{ + + pic_ipi_send(cpus, ipi); +}