From owner-svn-src-head@FreeBSD.ORG Sun Dec 7 22:49:48 2008 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 71EDF1065670; Sun, 7 Dec 2008 22:49:48 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 607698FC18; Sun, 7 Dec 2008 22:49:48 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id mB7Mnm12038342; Sun, 7 Dec 2008 22:49:48 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id mB7MnmdA038341; Sun, 7 Dec 2008 22:49:48 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <200812072249.mB7MnmdA038341@svn.freebsd.org> From: Warner Losh Date: Sun, 7 Dec 2008 22:49:48 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r185749 - head/sys/dev/pccbb X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 07 Dec 2008 22:49:48 -0000 Author: imp Date: Sun Dec 7 22:49:47 2008 New Revision: 185749 URL: http://svn.freebsd.org/changeset/base/185749 Log: Minor tweaks to some of the comments. Also, add a XXX wondering if we need to frob the 16-bit EXCA registers during the new interrupt-driven power-up sequence. Modified: head/sys/dev/pccbb/pccbb.c Modified: head/sys/dev/pccbb/pccbb.c ============================================================================== --- head/sys/dev/pccbb/pccbb.c Sun Dec 7 21:32:56 2008 (r185748) +++ head/sys/dev/pccbb/pccbb.c Sun Dec 7 22:49:47 2008 (r185749) @@ -765,15 +765,17 @@ cbb_power(device_t brdev, int volts) reg = cbb_o2micro_power_hack(sc); /* - * We have to mask the card change detect interrupt while - * we're messing with the power. It is allowed to bounce - * while we're messing with power as things settle down. In - * addition, we mask off the card's function interrupt by - * routing it via the ISA bus. This bit generally only - * affects 16-bit cards. Some bridges allow one to set - * another bit to have it also affect 32-bit cards. Since - * 32-bit cards are required to be better behaved, we don't - * bother to get into those bridge specific features. + * We have to mask the card change detect interrupt while we're + * messing with the power. It is allowed to bounce while we're + * messing with power as things settle down. In addition, we mask off + * the card's function interrupt by routing it via the ISA bus. This + * bit generally only affects 16-bit cards. Some bridges allow one to + * set another bit to have it also affect 32-bit cards. Since 32-bit + * cards are required to be better behaved, we don't bother to get + * into those bridge specific features. + * + * XXX I wonder if we need to enable the READY bit interrupt in the + * EXCA CSC register for 16-bit cards, and disable the CD bit? */ mask = cbb_get(sc, CBB_SOCKET_MASK); mask |= CBB_SOCKET_MASK_POWER; @@ -786,11 +788,10 @@ cbb_power(device_t brdev, int volts) mtx_lock(&sc->mtx); cnt = sc->powerintr; /* - * We have a shortish timeout of 500ms here. Some - * bridges do not generate a POWER_CYCLE event for - * 16-bit cards. In those cases, we have to cope the - * best we can, and having only a short delay is - * better than the alternatives. + * We have a shortish timeout of 500ms here. Some bridges do + * not generate a POWER_CYCLE event for 16-bit cards. In + * those cases, we have to cope the best we can, and having + * only a short delay is better than the alternatives. */ sane = 10; while (!(cbb_get(sc, CBB_SOCKET_STATE) & CBB_STATE_POWER_CYCLE) && @@ -798,9 +799,9 @@ cbb_power(device_t brdev, int volts) msleep(&sc->powerintr, &sc->mtx, 0, "-", hz / 20); mtx_unlock(&sc->mtx); /* - * The TOPIC95B requires a little bit extra time to get - * its act together, so delay for an additional 100ms. Also - * as documented below, it doesn't seem to set the POWER_CYCLE + * The TOPIC95B requires a little bit extra time to get its + * act together, so delay for an additional 100ms. Also as + * documented below, it doesn't seem to set the POWER_CYCLE * bit, so don't whine if it never came on. */ if (sc->chipset == CB_TOPIC95) {