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Date:      Thu, 4 Mar 2021 14:49:56 GMT
From:      Andrew Turner <andrew@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org
Subject:   git: 23553d6b940f - main - Fix creating the early arm64 level 2 blocks
Message-ID:  <202103041449.124EnuIH019745@gitrepo.freebsd.org>

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The branch main has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=23553d6b940f959f47045b544eefcdddf5db0949

commit 23553d6b940f959f47045b544eefcdddf5db0949
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2021-03-04 14:00:19 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2021-03-04 14:39:12 +0000

    Fix creating the early arm64 level 2 blocks
    
    In 48ba9b2669e6 we switched from creating level 1 blocks to smaller
    level 2 blocks when creating the early arm64 page tables. On issue
    was that they had a different meaning for register x7. The former used
    it to hold page table attributes, while the latter held just the memory
    type. This caused these attributes to be incorrectly shifted.
    
    Fix this by changing the meaning of x7 to hold the block attributes
    and fix the only caller that used the old meaning.
    
    Most hardware seems to have handled the bits being off however qemu
    failed to boot as reserved bits that should be zero were being set and
    qemu fails to clear these when translating from a virtual address to a
    physical address.
    
    Sponsored by:   Innovate UK
---
 sys/arm64/arm64/locore.S | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S
index 4d356e8897f0..bd013a870e34 100644
--- a/sys/arm64/arm64/locore.S
+++ b/sys/arm64/arm64/locore.S
@@ -430,7 +430,7 @@ common:
 
 	/* Create the kernel space L2 table */
 	mov	x6, x26
-	mov	x7, #VM_MEMATTR_WRITE_BACK
+	mov	x7, #(ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
 	mov	x8, #(KERNBASE & L2_BLOCK_MASK)
 	mov	x9, x28
 	bl	build_l2_block_pagetable
@@ -600,7 +600,7 @@ LEND(link_l1_pagetable)
 /*
  * Builds count 2 MiB page table entry
  *  x6  = L2 table
- *  x7  = Type (0 = Device, 1 = Normal)
+ *  x7  = Block attributes
  *  x8  = VA start
  *  x9  = PA start (trashed)
  *  x10 = Entry count (trashed)
@@ -615,8 +615,7 @@ LENTRY(build_l2_block_pagetable)
 	and	x11, x11, #Ln_ADDR_MASK
 
 	/* Build the L2 block entry */
-	lsl	x12, x7, #2
-	orr	x12, x12, #L2_BLOCK
+	orr	x12, x7, #L2_BLOCK
 	orr	x12, x12, #(ATTR_DEFAULT)
 	orr	x12, x12, #(ATTR_S1_UXN)
 



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