From owner-svn-src-head@freebsd.org Mon Sep 12 00:15:41 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 9CF96BD42AB; Mon, 12 Sep 2016 00:15:41 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 2FB9E854; Mon, 12 Sep 2016 00:15:41 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u8C0FeLd046244; Mon, 12 Sep 2016 00:15:40 GMT (envelope-from np@FreeBSD.org) Received: (from np@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u8C0Fem9046241; Mon, 12 Sep 2016 00:15:40 GMT (envelope-from np@FreeBSD.org) Message-Id: <201609120015.u8C0Fem9046241@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: np set sender to np@FreeBSD.org using -f From: Navdeep Parhar Date: Mon, 12 Sep 2016 00:15:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r305715 - in head/sys/dev/cxgbe: . firmware X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Sep 2016 00:15:41 -0000 Author: np Date: Mon Sep 12 00:15:40 2016 New Revision: 305715 URL: https://svnweb.freebsd.org/changeset/base/305715 Log: cxgbe(4): Catch up with the rename of tlscaps -> cryptocaps. TLS is one of the capabilities of the crypto engine in T6. Sponsored by: Chelsio Communications Modified: head/sys/dev/cxgbe/adapter.h head/sys/dev/cxgbe/firmware/t4fw_interface.h head/sys/dev/cxgbe/t4_main.c Modified: head/sys/dev/cxgbe/adapter.h ============================================================================== --- head/sys/dev/cxgbe/adapter.h Mon Sep 12 00:03:14 2016 (r305714) +++ head/sys/dev/cxgbe/adapter.h Mon Sep 12 00:15:40 2016 (r305715) @@ -835,7 +835,7 @@ struct adapter { uint16_t niccaps; uint16_t toecaps; uint16_t rdmacaps; - uint16_t tlscaps; + uint16_t cryptocaps; uint16_t iscsicaps; uint16_t fcoecaps; Modified: head/sys/dev/cxgbe/firmware/t4fw_interface.h ============================================================================== --- head/sys/dev/cxgbe/firmware/t4fw_interface.h Mon Sep 12 00:03:14 2016 (r305714) +++ head/sys/dev/cxgbe/firmware/t4fw_interface.h Mon Sep 12 00:15:40 2016 (r305715) @@ -135,7 +135,9 @@ enum fw_wr_opcodes { FW_POFCOE_ULPTX_WR = 0x43, FW_ISCSI_TX_DATA_WR = 0x45, FW_PTP_TX_PKT_WR = 0x46, - FW_SEC_LOOKASIDE_LPBK_WR= 0x6d, + FW_TLSTX_DATA_WR = 0x68, + FW_TLS_KEYCTX_TX_WR = 0x69, + FW_CRYPTO_LOOKASIDE_WR = 0x6d, FW_COiSCSI_TGT_WR = 0x70, FW_COiSCSI_TGT_CONN_WR = 0x71, FW_COiSCSI_TGT_XMIT_WR = 0x72, @@ -3384,8 +3386,429 @@ struct fw_pi_error { #define G_FW_PI_ERROR_ERR_TYPE(x) \ (((x) >> S_FW_PI_ERROR_ERR_TYPE) & M_FW_PI_ERROR_ERR_TYPE) +struct fw_tlstx_data_wr { + __be32 op_to_immdlen; + __be32 flowid_len16; + __be32 plen; + __be32 lsodisable_to_flags; + __be32 ddraddr; + __be32 ctxloc_to_exp; + __be16 mfs; + __u8 r6[6]; +}; + +#define S_FW_TLSTX_DATA_WR_COMPL 21 +#define M_FW_TLSTX_DATA_WR_COMPL 0x1 +#define V_FW_TLSTX_DATA_WR_COMPL(x) ((x) << S_FW_TLSTX_DATA_WR_COMPL) +#define G_FW_TLSTX_DATA_WR_COMPL(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_COMPL) & M_FW_TLSTX_DATA_WR_COMPL) +#define F_FW_TLSTX_DATA_WR_COMPL V_FW_TLSTX_DATA_WR_COMPL(1U) + +#define S_FW_TLSTX_DATA_WR_IMMDLEN 0 +#define M_FW_TLSTX_DATA_WR_IMMDLEN 0xff +#define V_FW_TLSTX_DATA_WR_IMMDLEN(x) ((x) << S_FW_TLSTX_DATA_WR_IMMDLEN) +#define G_FW_TLSTX_DATA_WR_IMMDLEN(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_IMMDLEN) & M_FW_TLSTX_DATA_WR_IMMDLEN) + +#define S_FW_TLSTX_DATA_WR_FLOWID 8 +#define M_FW_TLSTX_DATA_WR_FLOWID 0xfffff +#define V_FW_TLSTX_DATA_WR_FLOWID(x) ((x) << S_FW_TLSTX_DATA_WR_FLOWID) +#define G_FW_TLSTX_DATA_WR_FLOWID(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_FLOWID) & M_FW_TLSTX_DATA_WR_FLOWID) + +#define S_FW_TLSTX_DATA_WR_LEN16 0 +#define M_FW_TLSTX_DATA_WR_LEN16 0xff +#define V_FW_TLSTX_DATA_WR_LEN16(x) ((x) << S_FW_TLSTX_DATA_WR_LEN16) +#define G_FW_TLSTX_DATA_WR_LEN16(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_LEN16) & M_FW_TLSTX_DATA_WR_LEN16) + +#define S_FW_TLSTX_DATA_WR_LSODISABLE 31 +#define M_FW_TLSTX_DATA_WR_LSODISABLE 0x1 +#define V_FW_TLSTX_DATA_WR_LSODISABLE(x) \ + ((x) << S_FW_TLSTX_DATA_WR_LSODISABLE) +#define G_FW_TLSTX_DATA_WR_LSODISABLE(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_LSODISABLE) & M_FW_TLSTX_DATA_WR_LSODISABLE) +#define F_FW_TLSTX_DATA_WR_LSODISABLE V_FW_TLSTX_DATA_WR_LSODISABLE(1U) + +#define S_FW_TLSTX_DATA_WR_ALIGNPLD 30 +#define M_FW_TLSTX_DATA_WR_ALIGNPLD 0x1 +#define V_FW_TLSTX_DATA_WR_ALIGNPLD(x) ((x) << S_FW_TLSTX_DATA_WR_ALIGNPLD) +#define G_FW_TLSTX_DATA_WR_ALIGNPLD(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_ALIGNPLD) & M_FW_TLSTX_DATA_WR_ALIGNPLD) +#define F_FW_TLSTX_DATA_WR_ALIGNPLD V_FW_TLSTX_DATA_WR_ALIGNPLD(1U) + +#define S_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE 29 +#define M_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE 0x1 +#define V_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE(x) \ + ((x) << S_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE) +#define G_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE) & \ + M_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE) +#define F_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE V_FW_TLSTX_DATA_WR_ALIGNPLDSHOVE(1U) + +#define S_FW_TLSTX_DATA_WR_FLAGS 0 +#define M_FW_TLSTX_DATA_WR_FLAGS 0xfffffff +#define V_FW_TLSTX_DATA_WR_FLAGS(x) ((x) << S_FW_TLSTX_DATA_WR_FLAGS) +#define G_FW_TLSTX_DATA_WR_FLAGS(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_FLAGS) & M_FW_TLSTX_DATA_WR_FLAGS) + +#define S_FW_TLSTX_DATA_WR_CTXLOC 30 +#define M_FW_TLSTX_DATA_WR_CTXLOC 0x3 +#define V_FW_TLSTX_DATA_WR_CTXLOC(x) ((x) << S_FW_TLSTX_DATA_WR_CTXLOC) +#define G_FW_TLSTX_DATA_WR_CTXLOC(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_CTXLOC) & M_FW_TLSTX_DATA_WR_CTXLOC) + +#define S_FW_TLSTX_DATA_WR_IVDSGL 29 +#define M_FW_TLSTX_DATA_WR_IVDSGL 0x1 +#define V_FW_TLSTX_DATA_WR_IVDSGL(x) ((x) << S_FW_TLSTX_DATA_WR_IVDSGL) +#define G_FW_TLSTX_DATA_WR_IVDSGL(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_IVDSGL) & M_FW_TLSTX_DATA_WR_IVDSGL) +#define F_FW_TLSTX_DATA_WR_IVDSGL V_FW_TLSTX_DATA_WR_IVDSGL(1U) + +#define S_FW_TLSTX_DATA_WR_KEYSIZE 24 +#define M_FW_TLSTX_DATA_WR_KEYSIZE 0x1f +#define V_FW_TLSTX_DATA_WR_KEYSIZE(x) ((x) << S_FW_TLSTX_DATA_WR_KEYSIZE) +#define G_FW_TLSTX_DATA_WR_KEYSIZE(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_KEYSIZE) & M_FW_TLSTX_DATA_WR_KEYSIZE) + +#define S_FW_TLSTX_DATA_WR_NUMIVS 14 +#define M_FW_TLSTX_DATA_WR_NUMIVS 0xff +#define V_FW_TLSTX_DATA_WR_NUMIVS(x) ((x) << S_FW_TLSTX_DATA_WR_NUMIVS) +#define G_FW_TLSTX_DATA_WR_NUMIVS(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_NUMIVS) & M_FW_TLSTX_DATA_WR_NUMIVS) + +#define S_FW_TLSTX_DATA_WR_EXP 0 +#define M_FW_TLSTX_DATA_WR_EXP 0x3fff +#define V_FW_TLSTX_DATA_WR_EXP(x) ((x) << S_FW_TLSTX_DATA_WR_EXP) +#define G_FW_TLSTX_DATA_WR_EXP(x) \ + (((x) >> S_FW_TLSTX_DATA_WR_EXP) & M_FW_TLSTX_DATA_WR_EXP) + +struct fw_tls_keyctx_tx_wr { + __be32 op_to_compl; + __be32 flowid_len16; + union fw_key_ctx { + struct fw_tx_keyctx_hdr { + __u8 ctxlen; + __u8 r2; + __be16 dualck_to_txvalid; + __u8 txsalt[4]; + __be64 r5; + } txhdr; + struct fw_rx_keyctx_hdr { + __u8 flitcnt_hmacctrl; + __u8 protover_ciphmode; + __u8 authmode_to_rxvalid; + __u8 ivpresent_to_rxmk_size; + __u8 rxsalt[4]; + __be64 ivinsert_to_authinsrt; + } rxhdr; + struct fw_keyctx_clear { + __be32 tx_key; + __be32 rx_key; + } kctx_clr; + } u; + struct keys { + __u8 edkey[32]; + __u8 ipad[64]; + __u8 opad[64]; + } keys; + __u8 reneg_to_write_rx; + __u8 protocol; + __u8 r7[2]; + __be32 ftid; +}; + +#define S_FW_TLS_KEYCTX_TX_WR_OPCODE 24 +#define M_FW_TLS_KEYCTX_TX_WR_OPCODE 0xff +#define V_FW_TLS_KEYCTX_TX_WR_OPCODE(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_OPCODE) +#define G_FW_TLS_KEYCTX_TX_WR_OPCODE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_OPCODE) & M_FW_TLS_KEYCTX_TX_WR_OPCODE) + +#define S_FW_TLS_KEYCTX_TX_WR_ATOMIC 23 +#define M_FW_TLS_KEYCTX_TX_WR_ATOMIC 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_ATOMIC(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_ATOMIC) +#define G_FW_TLS_KEYCTX_TX_WR_ATOMIC(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_ATOMIC) & M_FW_TLS_KEYCTX_TX_WR_ATOMIC) +#define F_FW_TLS_KEYCTX_TX_WR_ATOMIC V_FW_TLS_KEYCTX_TX_WR_ATOMIC(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_FLUSH 22 +#define M_FW_TLS_KEYCTX_TX_WR_FLUSH 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_FLUSH(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_FLUSH) +#define G_FW_TLS_KEYCTX_TX_WR_FLUSH(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_FLUSH) & M_FW_TLS_KEYCTX_TX_WR_FLUSH) +#define F_FW_TLS_KEYCTX_TX_WR_FLUSH V_FW_TLS_KEYCTX_TX_WR_FLUSH(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_COMPL 21 +#define M_FW_TLS_KEYCTX_TX_WR_COMPL 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_COMPL(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_COMPL) +#define G_FW_TLS_KEYCTX_TX_WR_COMPL(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_COMPL) & M_FW_TLS_KEYCTX_TX_WR_COMPL) +#define F_FW_TLS_KEYCTX_TX_WR_COMPL V_FW_TLS_KEYCTX_TX_WR_COMPL(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_FLOWID 8 +#define M_FW_TLS_KEYCTX_TX_WR_FLOWID 0xfffff +#define V_FW_TLS_KEYCTX_TX_WR_FLOWID(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_FLOWID) +#define G_FW_TLS_KEYCTX_TX_WR_FLOWID(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_FLOWID) & M_FW_TLS_KEYCTX_TX_WR_FLOWID) + +#define S_FW_TLS_KEYCTX_TX_WR_LEN16 0 +#define M_FW_TLS_KEYCTX_TX_WR_LEN16 0xff +#define V_FW_TLS_KEYCTX_TX_WR_LEN16(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_LEN16) +#define G_FW_TLS_KEYCTX_TX_WR_LEN16(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_LEN16) & M_FW_TLS_KEYCTX_TX_WR_LEN16) + +#define S_FW_TLS_KEYCTX_TX_WR_DUALCK 12 +#define M_FW_TLS_KEYCTX_TX_WR_DUALCK 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_DUALCK(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_DUALCK) +#define G_FW_TLS_KEYCTX_TX_WR_DUALCK(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_DUALCK) & M_FW_TLS_KEYCTX_TX_WR_DUALCK) +#define F_FW_TLS_KEYCTX_TX_WR_DUALCK V_FW_TLS_KEYCTX_TX_WR_DUALCK(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT 11 +#define M_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT) +#define G_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT) & \ + M_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT) +#define F_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT \ + V_FW_TLS_KEYCTX_TX_WR_TXOPAD_PRESENT(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT 10 +#define M_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT) +#define G_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT) & \ + M_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT) +#define F_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT \ + V_FW_TLS_KEYCTX_TX_WR_SALT_PRESENT(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE 6 +#define M_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE 0xf +#define V_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE) +#define G_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE) & \ + M_FW_TLS_KEYCTX_TX_WR_TXCK_SIZE) + +#define S_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE 2 +#define M_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE 0xf +#define V_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE) +#define G_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE) & \ + M_FW_TLS_KEYCTX_TX_WR_TXMK_SIZE) + +#define S_FW_TLS_KEYCTX_TX_WR_TXVALID 0 +#define M_FW_TLS_KEYCTX_TX_WR_TXVALID 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_TXVALID(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_TXVALID) +#define G_FW_TLS_KEYCTX_TX_WR_TXVALID(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_TXVALID) & M_FW_TLS_KEYCTX_TX_WR_TXVALID) +#define F_FW_TLS_KEYCTX_TX_WR_TXVALID V_FW_TLS_KEYCTX_TX_WR_TXVALID(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_FLITCNT 3 +#define M_FW_TLS_KEYCTX_TX_WR_FLITCNT 0x1f +#define V_FW_TLS_KEYCTX_TX_WR_FLITCNT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_FLITCNT) +#define G_FW_TLS_KEYCTX_TX_WR_FLITCNT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_FLITCNT) & M_FW_TLS_KEYCTX_TX_WR_FLITCNT) + +#define S_FW_TLS_KEYCTX_TX_WR_HMACCTRL 0 +#define M_FW_TLS_KEYCTX_TX_WR_HMACCTRL 0x7 +#define V_FW_TLS_KEYCTX_TX_WR_HMACCTRL(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_HMACCTRL) +#define G_FW_TLS_KEYCTX_TX_WR_HMACCTRL(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_HMACCTRL) & M_FW_TLS_KEYCTX_TX_WR_HMACCTRL) + +#define S_FW_TLS_KEYCTX_TX_WR_PROTOVER 4 +#define M_FW_TLS_KEYCTX_TX_WR_PROTOVER 0xf +#define V_FW_TLS_KEYCTX_TX_WR_PROTOVER(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_PROTOVER) +#define G_FW_TLS_KEYCTX_TX_WR_PROTOVER(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_PROTOVER) & M_FW_TLS_KEYCTX_TX_WR_PROTOVER) + +#define S_FW_TLS_KEYCTX_TX_WR_CIPHMODE 0 +#define M_FW_TLS_KEYCTX_TX_WR_CIPHMODE 0xf +#define V_FW_TLS_KEYCTX_TX_WR_CIPHMODE(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_CIPHMODE) +#define G_FW_TLS_KEYCTX_TX_WR_CIPHMODE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_CIPHMODE) & M_FW_TLS_KEYCTX_TX_WR_CIPHMODE) + +#define S_FW_TLS_KEYCTX_TX_WR_AUTHMODE 4 +#define M_FW_TLS_KEYCTX_TX_WR_AUTHMODE 0xf +#define V_FW_TLS_KEYCTX_TX_WR_AUTHMODE(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_AUTHMODE) +#define G_FW_TLS_KEYCTX_TX_WR_AUTHMODE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_AUTHMODE) & M_FW_TLS_KEYCTX_TX_WR_AUTHMODE) + +#define S_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL 3 +#define M_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL) +#define G_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL) & \ + M_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL) +#define F_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL \ + V_FW_TLS_KEYCTX_TX_WR_CIPHAUTHSEQCTRL(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL 1 +#define M_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL 0x3 +#define V_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL) +#define G_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL) & \ + M_FW_TLS_KEYCTX_TX_WR_SEQNUMCTRL) + +#define S_FW_TLS_KEYCTX_TX_WR_RXVALID 0 +#define M_FW_TLS_KEYCTX_TX_WR_RXVALID 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_RXVALID(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_RXVALID) +#define G_FW_TLS_KEYCTX_TX_WR_RXVALID(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_RXVALID) & M_FW_TLS_KEYCTX_TX_WR_RXVALID) +#define F_FW_TLS_KEYCTX_TX_WR_RXVALID V_FW_TLS_KEYCTX_TX_WR_RXVALID(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_IVPRESENT 7 +#define M_FW_TLS_KEYCTX_TX_WR_IVPRESENT 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_IVPRESENT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_IVPRESENT) +#define G_FW_TLS_KEYCTX_TX_WR_IVPRESENT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_IVPRESENT) & \ + M_FW_TLS_KEYCTX_TX_WR_IVPRESENT) +#define F_FW_TLS_KEYCTX_TX_WR_IVPRESENT V_FW_TLS_KEYCTX_TX_WR_IVPRESENT(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT 6 +#define M_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT) +#define G_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT) & \ + M_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT) +#define F_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT \ + V_FW_TLS_KEYCTX_TX_WR_RXOPAD_PRESENT(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE 3 +#define M_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE 0x7 +#define V_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE) +#define G_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE) & \ + M_FW_TLS_KEYCTX_TX_WR_RXCK_SIZE) + +#define S_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE 0 +#define M_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE 0x7 +#define V_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE) +#define G_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE) & \ + M_FW_TLS_KEYCTX_TX_WR_RXMK_SIZE) + +#define S_FW_TLS_KEYCTX_TX_WR_IVINSERT 55 +#define M_FW_TLS_KEYCTX_TX_WR_IVINSERT 0x1ffULL +#define V_FW_TLS_KEYCTX_TX_WR_IVINSERT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_IVINSERT) +#define G_FW_TLS_KEYCTX_TX_WR_IVINSERT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_IVINSERT) & M_FW_TLS_KEYCTX_TX_WR_IVINSERT) + +#define S_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST 47 +#define M_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST 0xffULL +#define V_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST) +#define G_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST) & \ + M_FW_TLS_KEYCTX_TX_WR_AADSTRTOFST) + +#define S_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST 39 +#define M_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST 0xffULL +#define V_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST) +#define G_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST) & \ + M_FW_TLS_KEYCTX_TX_WR_AADSTOPOFST) + +#define S_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST 30 +#define M_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST 0x1ffULL +#define V_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST) +#define G_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST) & \ + M_FW_TLS_KEYCTX_TX_WR_CIPHERSRTOFST) + +#define S_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST 23 +#define M_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST 0x7f +#define V_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST) +#define G_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST) & \ + M_FW_TLS_KEYCTX_TX_WR_CIPHERSTOPOFST) + +#define S_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST 14 +#define M_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST 0x1ff +#define V_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST) +#define G_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST) & \ + M_FW_TLS_KEYCTX_TX_WR_AUTHSRTOFST) + +#define S_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST 7 +#define M_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST 0x7f +#define V_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST) +#define G_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST) & \ + M_FW_TLS_KEYCTX_TX_WR_AUTHSTOPOFST) + +#define S_FW_TLS_KEYCTX_TX_WR_AUTHINSRT 0 +#define M_FW_TLS_KEYCTX_TX_WR_AUTHINSRT 0x7f +#define V_FW_TLS_KEYCTX_TX_WR_AUTHINSRT(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_AUTHINSRT) +#define G_FW_TLS_KEYCTX_TX_WR_AUTHINSRT(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_AUTHINSRT) & \ + M_FW_TLS_KEYCTX_TX_WR_AUTHINSRT) + +#define S_FW_TLS_KEYCTX_TX_WR_RENEG 4 +#define M_FW_TLS_KEYCTX_TX_WR_RENEG 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_RENEG(x) ((x) << S_FW_TLS_KEYCTX_TX_WR_RENEG) +#define G_FW_TLS_KEYCTX_TX_WR_RENEG(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_RENEG) & M_FW_TLS_KEYCTX_TX_WR_RENEG) +#define F_FW_TLS_KEYCTX_TX_WR_RENEG V_FW_TLS_KEYCTX_TX_WR_RENEG(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_DELETE_TX 3 +#define M_FW_TLS_KEYCTX_TX_WR_DELETE_TX 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_DELETE_TX(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_DELETE_TX) +#define G_FW_TLS_KEYCTX_TX_WR_DELETE_TX(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_DELETE_TX) & \ + M_FW_TLS_KEYCTX_TX_WR_DELETE_TX) +#define F_FW_TLS_KEYCTX_TX_WR_DELETE_TX V_FW_TLS_KEYCTX_TX_WR_DELETE_TX(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_DELETE_RX 2 +#define M_FW_TLS_KEYCTX_TX_WR_DELETE_RX 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_DELETE_RX(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_DELETE_RX) +#define G_FW_TLS_KEYCTX_TX_WR_DELETE_RX(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_DELETE_RX) & \ + M_FW_TLS_KEYCTX_TX_WR_DELETE_RX) +#define F_FW_TLS_KEYCTX_TX_WR_DELETE_RX V_FW_TLS_KEYCTX_TX_WR_DELETE_RX(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_WRITE_TX 1 +#define M_FW_TLS_KEYCTX_TX_WR_WRITE_TX 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_WRITE_TX(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_WRITE_TX) +#define G_FW_TLS_KEYCTX_TX_WR_WRITE_TX(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_WRITE_TX) & M_FW_TLS_KEYCTX_TX_WR_WRITE_TX) +#define F_FW_TLS_KEYCTX_TX_WR_WRITE_TX V_FW_TLS_KEYCTX_TX_WR_WRITE_TX(1U) + +#define S_FW_TLS_KEYCTX_TX_WR_WRITE_RX 0 +#define M_FW_TLS_KEYCTX_TX_WR_WRITE_RX 0x1 +#define V_FW_TLS_KEYCTX_TX_WR_WRITE_RX(x) \ + ((x) << S_FW_TLS_KEYCTX_TX_WR_WRITE_RX) +#define G_FW_TLS_KEYCTX_TX_WR_WRITE_RX(x) \ + (((x) >> S_FW_TLS_KEYCTX_TX_WR_WRITE_RX) & M_FW_TLS_KEYCTX_TX_WR_WRITE_RX) +#define F_FW_TLS_KEYCTX_TX_WR_WRITE_RX V_FW_TLS_KEYCTX_TX_WR_WRITE_RX(1U) -struct fw_sec_lookaside_lpbk_wr { +struct fw_crypto_lookaside_wr { __be32 op_to_cctx_size; __be32 len16_pkd; __be32 session_id; @@ -3395,116 +3818,116 @@ struct fw_sec_lookaside_lpbk_wr { __be64 cookie; }; -#define S_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE 24 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE 0xff -#define V_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_OPCODE) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_COMPL 23 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_COMPL 0x1 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_COMPL(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_COMPL) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_COMPL(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_COMPL) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_COMPL) -#define F_FW_SEC_LOOKASIDE_LPBK_WR_COMPL V_FW_SEC_LOOKASIDE_LPBK_WR_COMPL(1U) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN 15 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN 0xff -#define V_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_IMM_LEN) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC 5 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC 0x3 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_LOC) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE 0 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE 0x1f -#define V_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_CCTX_SIZE) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_LEN16 0 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_LEN16 0xff -#define V_FW_SEC_LOOKASIDE_LPBK_WR_LEN16(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_LEN16) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_LEN16(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_LEN16) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_LEN16) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID 29 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID 0x3 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_RX_CHID) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_LCB 27 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_LCB 0x3 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_LCB(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_LCB) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_LCB(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_LCB) & M_FW_SEC_LOOKASIDE_LPBK_WR_LCB) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_PHASH 25 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_PHASH 0x3 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_PHASH(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_PHASH) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_PHASH(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_PHASH) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_PHASH) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_IV 23 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_IV 0x3 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_IV(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_IV) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_IV(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_IV) & M_FW_SEC_LOOKASIDE_LPBK_WR_IV) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH 10 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH 0x3 -#define V_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_TX_CH) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID 0 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID 0x3ff -#define V_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_RX_Q_ID) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE 24 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE 0xff -#define V_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_PLD_SIZE) - -#define S_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE 17 -#define M_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE 0x7f -#define V_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE(x) \ - ((x) << S_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE) -#define G_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE(x) \ - (((x) >> S_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE) & \ - M_FW_SEC_LOOKASIDE_LPBK_WR_HASH_SIZE) +#define S_FW_CRYPTO_LOOKASIDE_WR_OPCODE 24 +#define M_FW_CRYPTO_LOOKASIDE_WR_OPCODE 0xff +#define V_FW_CRYPTO_LOOKASIDE_WR_OPCODE(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_OPCODE) +#define G_FW_CRYPTO_LOOKASIDE_WR_OPCODE(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_OPCODE) & \ + M_FW_CRYPTO_LOOKASIDE_WR_OPCODE) + +#define S_FW_CRYPTO_LOOKASIDE_WR_COMPL 23 +#define M_FW_CRYPTO_LOOKASIDE_WR_COMPL 0x1 +#define V_FW_CRYPTO_LOOKASIDE_WR_COMPL(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_COMPL) +#define G_FW_CRYPTO_LOOKASIDE_WR_COMPL(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_COMPL) & \ + M_FW_CRYPTO_LOOKASIDE_WR_COMPL) +#define F_FW_CRYPTO_LOOKASIDE_WR_COMPL V_FW_CRYPTO_LOOKASIDE_WR_COMPL(1U) + +#define S_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN 15 +#define M_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN 0xff +#define V_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN) +#define G_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN) & \ + M_FW_CRYPTO_LOOKASIDE_WR_IMM_LEN) + +#define S_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC 5 +#define M_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC 0x3 +#define V_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC) +#define G_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC) & \ + M_FW_CRYPTO_LOOKASIDE_WR_CCTX_LOC) + +#define S_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE 0 +#define M_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE 0x1f +#define V_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE) +#define G_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE) & \ + M_FW_CRYPTO_LOOKASIDE_WR_CCTX_SIZE) + +#define S_FW_CRYPTO_LOOKASIDE_WR_LEN16 0 +#define M_FW_CRYPTO_LOOKASIDE_WR_LEN16 0xff +#define V_FW_CRYPTO_LOOKASIDE_WR_LEN16(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_LEN16) +#define G_FW_CRYPTO_LOOKASIDE_WR_LEN16(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_LEN16) & \ + M_FW_CRYPTO_LOOKASIDE_WR_LEN16) + +#define S_FW_CRYPTO_LOOKASIDE_WR_RX_CHID 29 +#define M_FW_CRYPTO_LOOKASIDE_WR_RX_CHID 0x3 +#define V_FW_CRYPTO_LOOKASIDE_WR_RX_CHID(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_RX_CHID) +#define G_FW_CRYPTO_LOOKASIDE_WR_RX_CHID(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_RX_CHID) & \ + M_FW_CRYPTO_LOOKASIDE_WR_RX_CHID) + +#define S_FW_CRYPTO_LOOKASIDE_WR_LCB 27 +#define M_FW_CRYPTO_LOOKASIDE_WR_LCB 0x3 +#define V_FW_CRYPTO_LOOKASIDE_WR_LCB(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_LCB) +#define G_FW_CRYPTO_LOOKASIDE_WR_LCB(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_LCB) & M_FW_CRYPTO_LOOKASIDE_WR_LCB) + +#define S_FW_CRYPTO_LOOKASIDE_WR_PHASH 25 +#define M_FW_CRYPTO_LOOKASIDE_WR_PHASH 0x3 +#define V_FW_CRYPTO_LOOKASIDE_WR_PHASH(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_PHASH) +#define G_FW_CRYPTO_LOOKASIDE_WR_PHASH(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_PHASH) & \ + M_FW_CRYPTO_LOOKASIDE_WR_PHASH) + +#define S_FW_CRYPTO_LOOKASIDE_WR_IV 23 +#define M_FW_CRYPTO_LOOKASIDE_WR_IV 0x3 +#define V_FW_CRYPTO_LOOKASIDE_WR_IV(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_IV) +#define G_FW_CRYPTO_LOOKASIDE_WR_IV(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_IV) & M_FW_CRYPTO_LOOKASIDE_WR_IV) + +#define S_FW_CRYPTO_LOOKASIDE_WR_TX_CH 10 +#define M_FW_CRYPTO_LOOKASIDE_WR_TX_CH 0x3 +#define V_FW_CRYPTO_LOOKASIDE_WR_TX_CH(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_TX_CH) +#define G_FW_CRYPTO_LOOKASIDE_WR_TX_CH(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_TX_CH) & \ + M_FW_CRYPTO_LOOKASIDE_WR_TX_CH) + +#define S_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID 0 +#define M_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID 0x3ff +#define V_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID) +#define G_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID) & \ + M_FW_CRYPTO_LOOKASIDE_WR_RX_Q_ID) + +#define S_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE 24 +#define M_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE 0xff +#define V_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE) +#define G_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE) & \ + M_FW_CRYPTO_LOOKASIDE_WR_PLD_SIZE) + +#define S_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE 17 +#define M_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE 0x7f +#define V_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE(x) \ + ((x) << S_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE) +#define G_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE(x) \ + (((x) >> S_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE) & \ + M_FW_CRYPTO_LOOKASIDE_WR_HASH_SIZE) /****************************************************************************** * C O M M A N D s @@ -4095,8 +4518,9 @@ enum fw_caps_config_iscsi { FW_CAPS_CONFIG_ISCSI_TARGET_CMDOFLD = 0x00000100, }; -enum fw_caps_config_tls { - FW_CAPS_CONFIG_TLSKEYS = 0x00000001, +enum fw_caps_config_crypto { + FW_CAPS_CONFIG_CRYPTO_LOOKASIDE = 0x00000001, + FW_CAPS_CONFIG_TLSKEYS = 0x00000002, }; enum fw_caps_config_fcoe { @@ -4128,7 +4552,7 @@ struct fw_caps_config_cmd { __be16 niccaps; __be16 toecaps; __be16 rdmacaps; - __be16 tlscaps; + __be16 cryptocaps; __be16 iscsicaps; __be16 fcoecaps; __be32 cfcsum; Modified: head/sys/dev/cxgbe/t4_main.c ============================================================================== --- head/sys/dev/cxgbe/t4_main.c Mon Sep 12 00:03:14 2016 (r305714) +++ head/sys/dev/cxgbe/t4_main.c Mon Sep 12 00:15:40 2016 (r305715) @@ -355,8 +355,8 @@ TUNABLE_INT("hw.cxgbe.toecaps_allowed", static int t4_rdmacaps_allowed = -1; TUNABLE_INT("hw.cxgbe.rdmacaps_allowed", &t4_rdmacaps_allowed); -static int t4_tlscaps_allowed = 0; -TUNABLE_INT("hw.cxgbe.tlscaps_allowed", &t4_tlscaps_allowed); +static int t4_cryptocaps_allowed = 0; +TUNABLE_INT("hw.cxgbe.cryptocaps_allowed", &t4_cryptocaps_allowed); static int t4_iscsicaps_allowed = -1; TUNABLE_INT("hw.cxgbe.iscsicaps_allowed", &t4_iscsicaps_allowed); @@ -3114,7 +3114,7 @@ use_config_on_flash: LIMIT_CAPS(niccaps); LIMIT_CAPS(toecaps); LIMIT_CAPS(rdmacaps); - LIMIT_CAPS(tlscaps); + LIMIT_CAPS(cryptocaps); LIMIT_CAPS(iscsicaps); LIMIT_CAPS(fcoecaps); #undef LIMIT_CAPS @@ -3251,7 +3251,7 @@ get_params__post_init(struct adapter *sc READ_CAPS(niccaps); READ_CAPS(toecaps); READ_CAPS(rdmacaps); - READ_CAPS(tlscaps); + READ_CAPS(cryptocaps); READ_CAPS(iscsicaps); READ_CAPS(fcoecaps); @@ -4684,7 +4684,7 @@ static char *caps_decoder[] = { "\005INITIATOR_SSNOFLD\006TARGET_SSNOFLD" "\007T10DIF" "\010INITIATOR_CMDOFLD\011TARGET_CMDOFLD", - "\20\00KEYS", /* 7: TLS */ + "\20\001LOOKASIDE\002TLSKEYS", /* 7: Crypto */ "\20\001INITIATOR\002TARGET\003CTRL_OFLD" /* 8: FCoE */ "\004PO_INITIATOR\005PO_TARGET", }; @@ -4792,7 +4792,7 @@ t4_sysctls(struct adapter *sc) SYSCTL_CAP(toecaps, 4, "TCP offload"); SYSCTL_CAP(rdmacaps, 5, "RDMA"); SYSCTL_CAP(iscsicaps, 6, "iSCSI"); - SYSCTL_CAP(tlscaps, 7, "TLS"); + SYSCTL_CAP(cryptocaps, 7, "crypto"); SYSCTL_CAP(fcoecaps, 8, "FCoE"); #undef SYSCTL_CAP