From owner-p4-projects@FreeBSD.ORG Thu Jul 5 13:17:58 2007 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id D150416A421; Thu, 5 Jul 2007 13:17:57 +0000 (UTC) X-Original-To: perforce@FreeBSD.org Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 9DE9916A400 for ; Thu, 5 Jul 2007 13:17:57 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [69.147.83.41]) by mx1.freebsd.org (Postfix) with ESMTP id 7701413C46A for ; Thu, 5 Jul 2007 13:17:57 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.8/8.13.8) with ESMTP id l65DHvmv072460 for ; Thu, 5 Jul 2007 13:17:57 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.8/8.13.8/Submit) id l65DHvRh072454 for perforce@freebsd.org; Thu, 5 Jul 2007 13:17:57 GMT (envelope-from gonzo@FreeBSD.org) Date: Thu, 5 Jul 2007 13:17:57 GMT Message-Id: <200707051317.l65DHvRh072454@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 122945 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Jul 2007 13:17:58 -0000 http://perforce.freebsd.org/chv.cgi?CH=122945 Change 122945 by gonzo@gonzo_jeeves on 2007/07/05 13:17:01 o Sync instructions cache in mips_vector_init after all exception vectors have been set. Affected files ... .. //depot/projects/mips2/src/sys/mips/mips/cpu.c#19 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/mips/cpu.c#19 (text+ko) ==== @@ -106,6 +106,7 @@ MIPS_INSTALL_VECTOR(CACHE, Cache); MIPS_INSTALL_VECTOR(INTERRUPT, Exception); /* XXX */ MIPS_INSTALL_VECTOR(GENERIC, Exception); + mips_icache_sync_all(); mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV); }