From owner-svn-src-head@FreeBSD.ORG Thu May 24 22:07:20 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 623851065780; Thu, 24 May 2012 22:07:20 +0000 (UTC) (envelope-from marcel@xcllnt.net) Received: from mail.xcllnt.net (mail.xcllnt.net [70.36.220.4]) by mx1.freebsd.org (Postfix) with ESMTP id 29C0E8FC15; Thu, 24 May 2012 22:07:20 +0000 (UTC) Received: from marcelm-sslvpn-nc.jnpr.net (natint3.juniper.net [66.129.224.36]) (authenticated bits=0) by mail.xcllnt.net (8.14.5/8.14.5) with ESMTP id q4OM78iQ075353 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Thu, 24 May 2012 15:07:13 -0700 (PDT) (envelope-from marcel@xcllnt.net) Mime-Version: 1.0 (Apple Message framework v1278) Content-Type: text/plain; charset=us-ascii From: Marcel Moolenaar In-Reply-To: <4FBEA493.4020702@freebsd.org> Date: Thu, 24 May 2012 15:07:03 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <201205242045.q4OKjipb059398@svn.freebsd.org> <4FBEA493.4020702@freebsd.org> To: Nathan Whitehorn X-Mailer: Apple Mail (2.1278) Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, Marcel Moolenaar , src-committers@freebsd.org Subject: Re: svn commit: r235931 - head/sys/powerpc/include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 May 2012 22:07:20 -0000 On May 24, 2012, at 2:13 PM, Nathan Whitehorn wrote: > On 05/24/12 15:45, Marcel Moolenaar wrote: >> Author: marcel >> Date: Thu May 24 20:45:44 2012 >> New Revision: 235931 >> URL: http://svn.freebsd.org/changeset/base/235931 >>=20 >> Log: >> Fix the memory barriers for CPUs that do not like lwsync and wedge = or cause >> exceptions early enough during boot that the kernel will do ithe = same. >> Use lwsync only when compiling for LP64 and revert to the more = proven isync >> when compiling for ILP32. Note that in the end (i.e. between = revision 222198 >> and this change) ILP32 changed from using sync to using isync. As = per Nathan >> the isync is needed to make sure I/O accesses are properly = serialized with >> locks and isync tends to be more effecient than sync. >>=20 >=20 > This badly breaks the synchronization primitives. The functions = mb()/wmb()/rmb() need to be sync or lwsync on ILP32, not isync. I guess I misinterpreted your email in which you stated that isync is = better. > Summary: > 1. *mb() must be lwsync or sync on all machines, except for wmb() = which could be eieio > 2. __ATOMIC_ACQ() must be isync (though could be reduced to lwsync = with bus_space changes) > 3. __ATOMIC_REL() must be lwsync or sync This is absolutely not what I concluded from our discussions. I have no = idea how we could end up so out of sync... --=20 Marcel Moolenaar marcel@xcllnt.net