From owner-svn-src-all@FreeBSD.ORG Fri Mar 25 00:03:22 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 658BF1065670; Fri, 25 Mar 2011 00:03:22 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 3A8E88FC08; Fri, 25 Mar 2011 00:03:22 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p2P03MYJ061353; Fri, 25 Mar 2011 00:03:22 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p2P03Mh5061350; Fri, 25 Mar 2011 00:03:22 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201103250003.p2P03Mh5061350@svn.freebsd.org> From: Adrian Chadd Date: Fri, 25 Mar 2011 00:03:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r219975 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Mar 2011 00:03:22 -0000 Author: adrian Date: Fri Mar 25 00:03:21 2011 New Revision: 219975 URL: http://svn.freebsd.org/changeset/base/219975 Log: Bring over interrupt mitigation changes from ath9k. * The existing interrupt mitigation code didn't mitigate anything - the per-packet TX/RX interrupts are still occuring. It's possible this worked for the AR5416 but not any later chipsets; I'll investigate and update as needed. * Set both the RX and TX threshold registers whilst I'm at it. This is verified to work on the AR9220 and AR9160. I'm leaving it off by default in case it's truely broken, but I need to have it enabled when doing 11n testing or interrupt loads exceed 10,000 interrupts/sec. Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c Thu Mar 24 21:31:32 2011 (r219974) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c Fri Mar 25 00:03:21 2011 (r219975) @@ -194,6 +194,23 @@ ar5416SetInterrupts(struct ath_hal *ah, mask = ints & HAL_INT_COMMON; mask2 = 0; +#ifdef AR5416_INT_MITIGATION + /* + * Overwrite default mask if Interrupt mitigation + * is specified for AR5416 + */ + mask = ints & HAL_INT_COMMON; + if (ints & HAL_INT_TX) + mask |= AR_IMR_TXMINTR | AR_IMR_TXINTM; + if (ints & HAL_INT_RX) + mask |= AR_IMR_RXERR | AR_IMR_RXMINTR | AR_IMR_RXINTM; + if (ints & HAL_INT_TX) { + if (ahp->ah_txErrInterruptMask) + mask |= AR_IMR_TXERR; + if (ahp->ah_txEolInterruptMask) + mask |= AR_IMR_TXEOL; + } +#else if (ints & HAL_INT_TX) { if (ahp->ah_txOkInterruptMask) mask |= AR_IMR_TXOK; @@ -206,16 +223,6 @@ ar5416SetInterrupts(struct ath_hal *ah, } if (ints & HAL_INT_RX) mask |= AR_IMR_RXOK | AR_IMR_RXERR | AR_IMR_RXDESC; -#ifdef AR5416_INT_MITIGATION - /* - * Overwrite default mask if Interrupt mitigation - * is specified for AR5416 - */ - mask = ints & HAL_INT_COMMON; - if (ints & HAL_INT_TX) - mask |= AR_IMR_TXMINTR | AR_IMR_TXINTM; - if (ints & HAL_INT_RX) - mask |= AR_IMR_RXERR | AR_IMR_RXMINTR | AR_IMR_RXINTM; #endif if (ints & (HAL_INT_BMISC)) { mask |= AR_IMR_BCNMISC; Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Thu Mar 24 21:31:32 2011 (r219974) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Fri Mar 25 00:03:21 2011 (r219975) @@ -307,8 +307,11 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO #ifdef AR5416_INT_MITIGATION OS_REG_WRITE(ah, AR_MIRT, 0); + OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500); OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000); + OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_LAST, 300); + OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_FIRST, 750); #endif ar5416InitBB(ah, chan);