Date: Thu, 12 Sep 1996 14:42:50 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: smp@csn.net (Steve Passe) Cc: peter@spinner.dialix.com, rv@groa.uct.ac.za, freebsd-smp@freebsd.org, terry@lambert.org Subject: Re: Intel XXpress - some SMP benchmarks Message-ID: <199609122142.OAA07599@phaeton.artisoft.com> In-Reply-To: <199609122004.OAA19225@clem.systemsix.com> from "Steve Passe" at Sep 12, 96 02:04:27 pm
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> if we have sparse tables, ie 16 entries (most of which will be empty), code
> like the following becomes very inefficient:
>
> #ifdef SMP
> for (j = i = 0; i < SPARSE_TABLE_SIZE; i++) {
> if (p == SMPcurproc[i])
> j++;
> }
> ...
Use it like a hash:
#ifdef SPARSE
int cpuid[ MAX_CPUID]; /* filled out by probe sequence*/
#define CPUID(x) (cpuid[ x])
#else /* !SPARSE*/
#define CPUID(x) (x)
#endif /* !SPARSE*/
Obviously, this would save one indirection per reference, which shouldn't
be too frequent anyway.
> Does anyone out there reading this list have a board with more than 2 CPUs?
> We might want to run some tests before we paint ourselves into either corner.
Erich has more than 2 CPU's; he also wrote the Linux SMP startup code.
> Terry earlier wondered how the Sequent supported 32 CPUs. There is a more
> complex 'heirarxchial model' that supports up to 60 APICs. This model
> requires additional custom hardware support. I don't think I wanna go there.
Too bad; my Alma Mater has two sequent boxes that were just donated to
them. 8-).
Terry Lambert
terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.
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