Date: Sun, 28 Feb 2010 13:45:17 -0500 From: George Neville-Neil <gnn@neville-neil.com> To: "M. Warner Losh" <imp@bsdimp.com> Cc: jkoshy@FreeBSD.org, embedded@FreeBSD.org, rpaulo@FreeBSD.org, fabient@FreeBSD.org Subject: Re: 3rd, and hopefully final, MIPS 24K hwpmc patch... Message-ID: <4169243C-D569-40E7-9115-09DB72F691FE@neville-neil.com> In-Reply-To: <20100228.013631.850602504923951271.imp@bsdimp.com> References: <9D9E6892-ABE5-44B3-965B-383D80366D1B@neville-neil.com> <BD8E018D-68E9-4566-BB0F-D52B84A62C11@freebsd.org> <20100228.013631.850602504923951271.imp@bsdimp.com>
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On Feb 28, 2010, at 03:36 , M. Warner Losh wrote: > In message: <BD8E018D-68E9-4566-BB0F-D52B84A62C11@freebsd.org> > Rui Paulo <rpaulo@FreeBSD.org> writes: > : > http://people.freebsd.org/~gnn/mipshwpmc_3.diff > : >=20 > : > The biggest change was breaking out MIPS24K from generic MIPS, = which will allow for the easy addition > : > of other types of MIPS chips in the near future. >=20 > @@ -2681,6 +2724,10 @@ > } else if (pe >=3D PMC_EV_XSCALE_FIRST && pe <=3D = PMC_EV_XSCALE_LAST) { > ev =3D xscale_event_table; > evfence =3D xscale_event_table + = PMC_EVENT_TABLE_SIZE(xscale); > + } else if (pe >=3D PMC_EV_MIPS24K_FIRST && pe <=3D = PMC_EV_MIPS24K_LAST) { > + ev =3D mips24k_event_table; > + evfence =3D mips24k_event_table + = PMC_EVENT_TABLE_SIZE(mips24k > +); >=20 > Looks like a stray new line. >=20 I can fix that. > There does seem to be a number of places where we mix mips, arm, and > x86 CPUs in case statements and the like. Yet there are other places > we carefully ifdef them. What's the determining factors here? >=20 Well I followed the current standard so perhaps Joseph can comment more clearly on this. > Also, the mips24k counters are specific to the mips24k, but the > harvesting of the counters is fairly generic to the mips architecture > (when counters are present). Why encode all the counter knowledge in > the kernel when it might make better sense to have the userland > routines do that decoding based on the core that's used? Maybe I'm > misunderstanding something here, but I do know that linux asks the CPU > how many performance counters there are and harvests them generically > across a wide range of MIPS cores. The decoding is done in libpmc but grabbing the counters out of the = hardware is done in the kernel. Unless I don't quite get what you're asking. BTW Realize that the patch is both library (user space) and kernel = (dev/hwpmc) so it can be a bit confusing, perhaps to look at. Best, George
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