From owner-p4-projects@FreeBSD.ORG Thu Jul 5 13:24:09 2007 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id D4E2B16A46D; Thu, 5 Jul 2007 13:24:08 +0000 (UTC) X-Original-To: perforce@FreeBSD.org Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id ABB7616A41F for ; Thu, 5 Jul 2007 13:24:08 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [69.147.83.41]) by mx1.freebsd.org (Postfix) with ESMTP id 9CB0013C4B7 for ; Thu, 5 Jul 2007 13:24:08 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.8/8.13.8) with ESMTP id l65DO82d073292 for ; Thu, 5 Jul 2007 13:24:08 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.8/8.13.8/Submit) id l65DO8RV073289 for perforce@freebsd.org; Thu, 5 Jul 2007 13:24:08 GMT (envelope-from gonzo@FreeBSD.org) Date: Thu, 5 Jul 2007 13:24:08 GMT Message-Id: <200707051324.l65DO8RV073289@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 122952 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Jul 2007 13:24:09 -0000 http://perforce.freebsd.org/chv.cgi?CH=122952 Change 122952 by gonzo@gonzo_jeeves on 2007/07/05 13:23:59 o Add read/write functions for watchlo/watchhi cp0 registers. Affected files ... .. //depot/projects/mips2/src/sys/mips/include/cpufunc.h#17 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/include/cpufunc.h#17 (text+ko) ==== @@ -191,6 +191,8 @@ MIPS_RDRW32_COP0(entryhi, MIPS_COP_0_TLB_HI); MIPS_RDRW32_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK); MIPS_RDRW32_COP0(prid, MIPS_COP_0_PRID); +MIPS_RDRW32_COP0(watchlo, MIPS_COP_0_WATCH_LO); +MIPS_RDRW32_COP0(watchhi, MIPS_COP_0_WATCH_HI); static __inline u_int32_t mips_rd_config_sel1(void)