From owner-svn-src-head@FreeBSD.ORG Fri Jun 28 22:47:33 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 9D6CB59B; Fri, 28 Jun 2013 22:47:33 +0000 (UTC) (envelope-from ray@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 904D11AD1; Fri, 28 Jun 2013 22:47:33 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id r5SMlXAX027292; Fri, 28 Jun 2013 22:47:33 GMT (envelope-from ray@svn.freebsd.org) Received: (from ray@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id r5SMlXwa027291; Fri, 28 Jun 2013 22:47:33 GMT (envelope-from ray@svn.freebsd.org) Message-Id: <201306282247.r5SMlXwa027291@svn.freebsd.org> From: Aleksandr Rybalko Date: Fri, 28 Jun 2013 22:47:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r252362 - head/sys/arm/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Jun 2013 22:47:33 -0000 Author: ray Date: Fri Jun 28 22:47:33 2013 New Revision: 252362 URL: http://svnweb.freebsd.org/changeset/base/252362 Log: Bump max number of IRQs for Cortex-Ax family to cover Exynos5 requirement. Submitted by: Ruslan Bukin Modified: head/sys/arm/include/intr.h Modified: head/sys/arm/include/intr.h ============================================================================== --- head/sys/arm/include/intr.h Fri Jun 28 22:31:17 2013 (r252361) +++ head/sys/arm/include/intr.h Fri Jun 28 22:47:33 2013 (r252362) @@ -51,7 +51,7 @@ defined(CPU_XSCALE_IXP435) #define NIRQ 64 #elif defined(CPU_CORTEXA) -#define NIRQ 128 +#define NIRQ 160 #elif defined(CPU_ARM1136) || defined(CPU_ARM1176) #define NIRQ 128 #elif defined(SOC_MV_ARMADAXP)