From nobody Thu May 1 14:22:38 2025 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4ZpGV65N1vz5vFg2; Thu, 01 May 2025 14:22:38 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4ZpGV644pgz3sk1; Thu, 01 May 2025 14:22:38 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1746109358; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=qTRwsfxKVwYvtMIzwePhJ5DuSNkELwOzmdyj5OQHgJs=; b=ibS4UOCV6lTsMxpOW2UrUkedu2TbT7r9+83iOEFlC5fKamFScSPVk9QMxugT6LmaQoGbLW XPnToAwzSSPg2G7i/uKFwM1BCWsdR0OWicuYEriBL3omTO49ACUAYAiunsR6HRCZ2jGulV yzeXMW3fije092Tr7yy18U8Ij9Uj1XaybjFqRAkNuiJCOC3tSdKHGR4ZIDS0OqYrXcVXXQ BqYr24WAVQ2rv5jf3nDPfUOUO1UikRV6OmZdPJle9ND4b3SSm0iYtsf+c7OlhaPmEdtcEi sMLho9VuK72YwHFPjOoRO9NaaUK6rjjhPVRnLaVnW1tVleoycoTXJfNTLTxAAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1746109358; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=qTRwsfxKVwYvtMIzwePhJ5DuSNkELwOzmdyj5OQHgJs=; b=b64rz7H7EHncYKNQyVLF4KBLGvUpSkHeu1HWXaK9HOKr1ZJBVQo84DDgpqq2KlBH/frBi2 u0EQ3//z3Nkma0aUlOpI31VsSsspcV+FpWsHCWw/K5qTKLn0K1bioR7ymqXyw8HxwTaMuu 07R1tXBuHXVbhEAQmnR+/nlxXACdSQox3akx1n/F1KQ/Eqx2dWLdRnZmRe6gSs/no/dU4t kd5tMSIED4q1hqQH7z/hnhHNePcKM8LBFYwP5NvIuFPwCG+9fMiFpCtIZlhhLAg11CP79t YjjXFLSRRhtbCcmUHVte6V6zYsnoly6MF2yIi8WHJp1Rs0nEx+NW45uthf4LBw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1746109358; a=rsa-sha256; cv=none; b=lxl2BX2Qs+vFE9OxQUvBRsVwfvp8KnQHN0lzi8wxW93mPjPUbhgVof2tJzHstJim9OjYFD eHqN2qjeun0BA5ply87zuPWEclGOiFul+VsC9CbhWrZSJdzwieev41qdPfkMTJuVoRimcR 2a9mrBXYkqwL3RU7oRIJ2dqWkRu5Oac9c73z1b6qKduZ9khqggS/T8HHLIqexWS5gmX1g1 XafvCURTGu9fK6k275RkqjxK2feE3xHf2M+ovpeLUx5aLeJmg5x01MtuV28xMCWOFk07xL xoT2gQTabTKUWy+gnjpiRoQKh7i3sKJ/QGVTnXwHwSnDVX4dqzVK9s64oW2Mgw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4ZpGV63hBXzXT0; Thu, 01 May 2025 14:22:38 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 541EMcIc051515; Thu, 1 May 2025 14:22:38 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 541EMcMu051512; Thu, 1 May 2025 14:22:38 GMT (envelope-from git) Date: Thu, 1 May 2025 14:22:38 GMT Message-Id: <202505011422.541EMcMu051512@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Mark Johnston Subject: git: 58dd3aa31d17 - main - arch.7: Add a section describing the user address space List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: markj X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 58dd3aa31d174666346dfb78205aae4bb5786d05 Auto-Submitted: auto-generated The branch main has been updated by markj: URL: https://cgit.FreeBSD.org/src/commit/?id=58dd3aa31d174666346dfb78205aae4bb5786d05 commit 58dd3aa31d174666346dfb78205aae4bb5786d05 Author: Mark Johnston AuthorDate: 2025-05-01 13:59:11 +0000 Commit: Mark Johnston CommitDate: 2025-05-01 14:22:25 +0000 arch.7: Add a section describing the user address space Provide some details about the user address space on each platform. Document platforms which support multiple address spaces. I didn't exhaustively document each platform's ABIs (e.g., the 32-bit compat ABI on amd64), but maybe that's worthwhile. Reviewed by: ziaee, kib, emaste Differential Revision: https://reviews.freebsd.org/D49931 --- share/man/man7/arch.7 | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/share/man/man7/arch.7 b/share/man/man7/arch.7 index 273c504ebaff..91f6953370d9 100644 --- a/share/man/man7/arch.7 +++ b/share/man/man7/arch.7 @@ -227,6 +227,60 @@ is 8 bytes on all supported architectures except i386. .It powerpc64le Ta 4K .It riscv64 Ta 4K, 2M, 1G .El +.Ss User Address Space Layout +.Bl -column -offset indent "riscv64 (Sv48)" "0x0001000000000000" "NNNU" +.It Sy Architecture Ta Sy Maximum Address Ta Sy Address Space Size +.It aarch64 Ta 0x0001000000000000 Ta 256TiB +.It amd64 (LA48) Ta 0x0000800000000000 Ta 128TiB +.It amd64 (LA57) Ta 0x0100000000000000 Ta 64PiB +.It armv7 Ta 0xbfc00000 Ta 3GiB +.It i386 Ta 0xffc00000 Ta 4GiB +.It powerpc Ta 0xfffff000 Ta 4GiB +.It powerpcspe Ta 0x7ffff000 Ta 2GiB +.It powerpc64 Ta 0x000fffffc0000000 Ta 4PiB +.It powerpc64le Ta 0x000fffffc0000000 Ta 4PiB +.It riscv64 (Sv39) Ta 0x0000004000000000 Ta 256GiB +.It riscv64 (Sv48) Ta 0x0000800000000000 Ta 128TiB +.El +.Pp +The layout of a process' address space can be queried via the +.Dv KERN_PROC_VM_LAYOUT +.Xr sysctl 3 +MIB. +.Pp +Historically, amd64 CPUs were limited to a 48-bit virtual address space. +Newer CPUs support 5-level page tables, which extend the significant bits of +addresses to 57 bits (LA57 mode). +The address space layout is determined by the CPU's support for LA57. +Setting the +.Sy vm.pmap.la57 +tunable to 0 forces the system into 4-level paging mode, even on hardware that +supports 5-level paging. +In this mode, all processes get a 48-bit address space. +The +.Sy vm.pmap.prefer_la48_uva +tunable determines whether processes running on a LA57 system are limited to +a 48-bit address space by default. +Some applications make use of unused upper bits in pointer values to store +information, and thus implicitly assume they are running in LA48 mode. +To avoid breaking compatibility, all processes run in LA48 mode by default. +The +.Xr elfctl 1 +utility can be used to request LA48 or LA57 mode for specific executables. +Similarly, +.Xr proccontrol 1 +can be used to configure the address space layout when executing a process. +.Pp +The RISC-V specification permits 3-level (Sv39), 4-level (Sv48), and +5-level (Sv57) page tables. +Hardware is only required to implement Sv39; implementations which support +Sv48 must also support Sv39, and implementations which support Sv57 must also +support Sv48. +The +.Sy vm.pmap.mode +tunable can be used to select the layout. +.Fx +currently supports Sv39 and Sv48 and defaults to using Sv39. .Ss Floating Point .Bl -column -offset indent "Architecture" "float, double" "long double" .It Sy Architecture Ta Sy float, double Ta Sy long double @@ -424,6 +478,9 @@ Like it is unused outside of that scope. .El .Sh SEE ALSO +.Xr elfctl 1 , +.Xr proccontrol 1 , +.Xr sysctl 3 , .Xr src.conf 5 , .Xr build 7 , .Xr simd 7