From nobody Fri Aug 4 09:50:38 2023 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RHLYp3bHFz4gwg3; Fri, 4 Aug 2023 09:50:38 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RHLYp2rt2z4LQ9; Fri, 4 Aug 2023 09:50:38 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1691142638; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=l45RITMyBHLnt5vWFq0oyXUF6cpijXOAT2dwFSms/ZU=; b=TV3Z5AdlERLfrLB6Zq2Vr2DkKEl5jCMDr9s/d5Uv1DT2J6jeLEKmtcCosjhiZpoFLe+5Vw Z0Is9P2K+/e1ZWNP9+MgRbaEmnIrQMAvFxRWZ3OCSt2GFrBPKySXspdjVg0Jlgi5aseGTk aKcSP4XYVm3N4fPM4bIzOILmBiqBgYqps7SoOYBnYr9x3ePQy+VQmvjWrdbhCYZLX5jniF 5hclKpF8GmaOdBC3Fiy9GbBH3Y40z67pulIJIzBdkKdq1/atUfdtk/V5Cc8kmP4txeF+em l9j1ddpmk2WSBLberG6yuDVJcR9pR682sLfvKMOFDyfqKeajxK7WKrRLuaVMOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1691142638; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=l45RITMyBHLnt5vWFq0oyXUF6cpijXOAT2dwFSms/ZU=; b=Sq+JvMNRCFqmyhXvYqcimWwR0DuCHGnqSARogEdyjjNe9J8qO8gVTNvn+4rm5ondGTzoGG gGixzIar9cEMVOlH9/CgjdqCKgg3+82c+RE9xvkOuwaiq2mqB0b4ZZx4cKFksS8umOFNfk hNVwx9ftW9jjBwTMthYgD1peUAGlJHDUfHcQNFwKulGaTlc0+jVcUEzklBN6JJFqIlWtD9 wSHiXKJgidw6+SGOwdgrx2lG8WAiLryMdUWdjqV4HmLx+U5WwDUO4/4SnSK6tR/2EJtOlv Fis76Mdln8Z82BlZK6ABUQleOi0lyF/CRkYL7DjArICooPijoMN6bR3mI0o4vg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1691142638; a=rsa-sha256; cv=none; b=gpMvbC/lDY9lR4Sq0IUF93jX4blcVPNZVaKTzKFz/IAFezKeWk6qMPGv7Hfys0WQRVgCKr CRCqYbXTfd7DzNPzKxZsqQLVAShtoPAYszgTTgkJMYlcvcyE04IpODm4ab4wSnkAdiOgF6 jEYXe/w0YG0ga+sZV4/nfRcyZa8bjzDuK+Y4+YYKHXBl7ELigE1Ot96PNNucF+q4Mvfjz6 1RXhWHE2F0/93jDDnZ+l6jLRPCM9RqRpYq+70U2p5FCgXL7CT4VGT5KTPW0fwwNdFQ74n3 D2WQ1/0TgiwSCgUa+KvjBAkiGEBtY5GaR2J7hFrZJu7d9BMSjkB+Fr7OMIcUHA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RHLYp1rK5zxvj; Fri, 4 Aug 2023 09:50:38 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 3749ocCa063218; Fri, 4 Aug 2023 09:50:38 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 3749ocPT063217; Fri, 4 Aug 2023 09:50:38 GMT (envelope-from git) Date: Fri, 4 Aug 2023 09:50:38 GMT Message-Id: <202308040950.3749ocPT063217@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: a2afd7b818fa - main - Remove MAXCPUS from the gicv3 driver List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: a2afd7b818fa6c25c1e66871339d907c7658322c Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=a2afd7b818fa6c25c1e66871339d907c7658322c commit a2afd7b818fa6c25c1e66871339d907c7658322c Author: Andrew Turner AuthorDate: 2023-08-04 09:14:16 +0000 Commit: Andrew Turner CommitDate: 2023-08-04 09:50:09 +0000 Remove MAXCPUS from the gicv3 driver We create a static array of pointers to per-CPU data. Because the cpuid space on arm64 is not sparse there is no need to add an extra level of indirection. Move to use mallocarray to allocate the redistributors as a single array. Sponsored by: Arm Ltd --- sys/arm64/arm64/gic_v3.c | 46 +++++++++++++++++--------------------------- sys/arm64/arm64/gic_v3_var.h | 10 +++++----- 2 files changed, 23 insertions(+), 33 deletions(-) diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c index d108cabfe4d9..c448320a86e8 100644 --- a/sys/arm64/arm64/gic_v3.c +++ b/sys/arm64/arm64/gic_v3.c @@ -226,8 +226,8 @@ gic_r_read_4(device_t dev, bus_size_t offset) struct resource *rdist; sc = device_get_softc(dev); - rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res; - offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)]->offset; + rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)].res; + offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)].offset; return (bus_read_4(rdist, offset)); } @@ -238,8 +238,8 @@ gic_r_read_8(device_t dev, bus_size_t offset) struct resource *rdist; sc = device_get_softc(dev); - rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res; - offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)]->offset; + rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)].res; + offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)].offset; return (bus_read_8(rdist, offset)); } @@ -250,8 +250,8 @@ gic_r_write_4(device_t dev, bus_size_t offset, uint32_t val) struct resource *rdist; sc = device_get_softc(dev); - rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res; - offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)]->offset; + rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)].res; + offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)].offset; bus_write_4(rdist, offset, val); } @@ -262,8 +262,8 @@ gic_r_write_8(device_t dev, bus_size_t offset, uint64_t val) struct resource *rdist; sc = device_get_softc(dev); - rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res; - offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)]->offset; + rdist = sc->gic_redists.pcpu[PCPU_GET(cpuid)].res; + offset += sc->gic_redists.pcpu[PCPU_GET(cpuid)].offset; bus_write_8(rdist, offset, val); } @@ -431,7 +431,6 @@ int gic_v3_detach(device_t dev) { struct gic_v3_softc *sc; - size_t i; int rid; sc = device_get_softc(dev); @@ -446,8 +445,7 @@ gic_v3_detach(device_t dev) for (rid = 0; rid < (sc->gic_redists.nregions + 1); rid++) bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->gic_res[rid]); - for (i = 0; i <= mp_maxid; i++) - free(sc->gic_redists.pcpu[i], M_GIC_V3); + free(sc->gic_redists.pcpu, M_GIC_V3); free(sc->ranges, M_GIC_V3); free(sc->gic_res, M_GIC_V3); @@ -497,7 +495,7 @@ gic_v3_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) *result = (intr_nirq - sc->gic_nirqs) / sc->gic_nchildren; return (0); case GICV3_IVAR_REDIST: - *result = (uintptr_t)sc->gic_redists.pcpu[PCPU_GET(cpuid)]; + *result = (uintptr_t)&sc->gic_redists.pcpu[PCPU_GET(cpuid)]; return (0); case GIC_IVAR_HW_REV: KASSERT( @@ -1231,8 +1229,8 @@ gic_v3_wait_for_rwp(struct gic_v3_softc *sc, enum gic_v3_xdist xdist) offset = 0; break; case REDIST: - res = sc->gic_redists.pcpu[cpuid]->res; - offset = sc->gic_redists.pcpu[PCPU_GET(cpuid)]->offset; + res = sc->gic_redists.pcpu[cpuid].res; + offset = sc->gic_redists.pcpu[PCPU_GET(cpuid)].offset; break; default: KASSERT(0, ("%s: Attempt to wait for unknown RWP", __func__)); @@ -1368,16 +1366,8 @@ gic_v3_dist_init(struct gic_v3_softc *sc) static int gic_v3_redist_alloc(struct gic_v3_softc *sc) { - u_int cpuid; - - /* Allocate struct resource for all CPU's Re-Distributor registers */ - for (cpuid = 0; cpuid <= mp_maxid; cpuid++) - if (CPU_ISSET(cpuid, &all_cpus) != 0) - sc->gic_redists.pcpu[cpuid] = - malloc(sizeof(*sc->gic_redists.pcpu[0]), - M_GIC_V3, M_WAITOK); - else - sc->gic_redists.pcpu[cpuid] = NULL; + sc->gic_redists.pcpu = mallocarray(mp_maxid + 1, + sizeof(sc->gic_redists.pcpu[0]), M_GIC_V3, M_WAITOK); return (0); } @@ -1423,12 +1413,12 @@ gic_v3_redist_find(struct gic_v3_softc *sc) do { typer = bus_read_8(r_res, offset + GICR_TYPER); if ((typer >> GICR_TYPER_AFF_SHIFT) == aff) { - KASSERT(sc->gic_redists.pcpu[cpuid] != NULL, + KASSERT(cpuid <= mp_maxid, ("Invalid pointer to per-CPU redistributor")); /* Copy res contents to its final destination */ - sc->gic_redists.pcpu[cpuid]->res = r_res; - sc->gic_redists.pcpu[cpuid]->offset = offset; - sc->gic_redists.pcpu[cpuid]->lpi_enabled = false; + sc->gic_redists.pcpu[cpuid].res = r_res; + sc->gic_redists.pcpu[cpuid].offset = offset; + sc->gic_redists.pcpu[cpuid].lpi_enabled = false; if (bootverbose) { device_printf(sc->dev, "CPU%u Re-Distributor has been found\n", diff --git a/sys/arm64/arm64/gic_v3_var.h b/sys/arm64/arm64/gic_v3_var.h index 47e73c1ab3b7..21fce2326d03 100644 --- a/sys/arm64/arm64/gic_v3_var.h +++ b/sys/arm64/arm64/gic_v3_var.h @@ -56,7 +56,7 @@ struct gic_redists { /* Number of Re-Distributor regions */ u_int nregions; /* Per-CPU Re-Distributor data */ - struct redist_pcpu *pcpu[MAXCPU]; + struct redist_pcpu *pcpu; }; struct gic_v3_softc { @@ -138,8 +138,8 @@ void gic_r_write_8(device_t, bus_size_t, uint64_t var); u_int cpu = PCPU_GET(cpuid); \ \ bus_read_##len( \ - (sc)->gic_redists.pcpu[cpu]->res, \ - (sc)->gic_redists.pcpu[cpu]->offset + (reg)); \ + (sc)->gic_redists.pcpu[cpu].res, \ + (sc)->gic_redists.pcpu[cpu].offset + (reg)); \ }) #define gic_r_write(sc, len, reg, val) \ @@ -147,8 +147,8 @@ void gic_r_write_8(device_t, bus_size_t, uint64_t var); u_int cpu = PCPU_GET(cpuid); \ \ bus_write_##len( \ - (sc)->gic_redists.pcpu[cpu]->res, \ - (sc)->gic_redists.pcpu[cpu]->offset + (reg), \ + (sc)->gic_redists.pcpu[cpu].res, \ + (sc)->gic_redists.pcpu[cpu].offset + (reg), \ (val)); \ })