From owner-svn-src-head@freebsd.org Fri Feb 17 18:49:20 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 1C46ECE231C; Fri, 17 Feb 2017 18:49:20 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D4D6C14BE; Fri, 17 Feb 2017 18:49:19 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1HInJvJ054392; Fri, 17 Feb 2017 18:49:19 GMT (envelope-from adrian@FreeBSD.org) Received: (from adrian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1HInIKA054389; Fri, 17 Feb 2017 18:49:18 GMT (envelope-from adrian@FreeBSD.org) Message-Id: <201702171849.v1HInIKA054389@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: adrian set sender to adrian@FreeBSD.org using -f From: Adrian Chadd Date: Fri, 17 Feb 2017 18:49:18 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r313880 - head/sys/dev/asmc X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Feb 2017 18:49:20 -0000 Author: adrian Date: Fri Feb 17 18:49:18 2017 New Revision: 313880 URL: https://svnweb.freebsd.org/changeset/base/313880 Log: [asmc] Add support for MacBook Pro 11,2 This patch will add support for MacBookPro 11.2. For the macros, the MBP11_* macros (for the existing MacBookPro11.3) did not match so they have been renamed to MBP113_* and a new MBP112_* has been added (modified copy of MBP11_*). Some trailing whitespaces may have been removed automatically. PR: kern/214836 Obtained from: Johannes Lundberg sc_mtx, "asmc", NULL, MTX_SPIN); @@ -495,13 +501,13 @@ asmc_attach(device_t dev) sc->sc_light_tree = SYSCTL_ADD_NODE(sysctlctx, SYSCTL_CHILDREN(sysctlnode), OID_AUTO, "light", CTLFLAG_RD, 0, "Keyboard backlight sensors"); - + SYSCTL_ADD_PROC(sysctlctx, SYSCTL_CHILDREN(sc->sc_light_tree), OID_AUTO, "left", CTLTYPE_INT | CTLFLAG_RD, dev, 0, model->smc_light_left, "I", "Keyboard backlight left sensor"); - + SYSCTL_ADD_PROC(sysctlctx, SYSCTL_CHILDREN(sc->sc_light_tree), OID_AUTO, "right", CTLTYPE_INT | CTLFLAG_RD, @@ -574,7 +580,7 @@ asmc_attach(device_t dev) goto err2; } - ret = bus_setup_intr(dev, sc->sc_irq, + ret = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE, #ifdef INTR_FILTER asmc_sms_intrfast, asmc_sms_handler, @@ -663,7 +669,7 @@ asmc_init(device_t dev) asmc_key_write(dev, ASMC_KEY_INTOK, buf, 1); DELAY(50); - /* + /* * Initiate the polling intervals. */ buf[0] = 20; /* msecs */ @@ -698,13 +704,13 @@ asmc_init(device_t dev) DELAY(100); sc->sc_sms_intr_works = 0; - + /* * Retry SMS initialization 1000 times * (takes approx. 2 seconds in worst case) */ for (i = 0; i < 1000; i++) { - if (asmc_key_read(dev, ASMC_KEY_SMS, buf, 2) == 0 && + if (asmc_key_read(dev, ASMC_KEY_SMS, buf, 2) == 0 && (buf[0] == ASMC_SMS_INIT1 && buf[1] == ASMC_SMS_INIT2)) { error = 0; sc->sc_sms_intr_works = 1; @@ -734,7 +740,7 @@ nosms: */ asmc_key_read(dev, ASMC_NKEYS, buf, 4); device_printf(dev, "number of keys: %d\n", ntohl(*(uint32_t*)buf)); - } + } #ifdef DEBUG asmc_dumpall(dev); @@ -782,10 +788,10 @@ asmc_wait(device_t dev, uint8_t val) #ifdef DEBUG device_printf(dev, "%s failed: 0x%x, 0x%x\n", __func__, val, ASMC_CMDPORT_READ(sc)); -#endif +#endif return (1); } - + /* * Send the given command, retrying up to 10 times if * the acknowledgement fails. @@ -919,7 +925,7 @@ out: maxlen = type[0]; type[0] = ' '; type[5] = 0; - if (maxlen > sizeof(v)) { + if (maxlen > sizeof(v)) { device_printf(dev, "WARNING: cropping maxlen from %d to %zu\n", maxlen, sizeof(v)); @@ -1189,7 +1195,7 @@ asmc_sms_read(device_t dev, const char * uint8_t buf[2]; int error; - /* no need to do locking here as asmc_key_read() already does it */ + /* no need to do locking here as asmc_key_read() already does it */ switch (key[3]) { case 'X': case 'Y': @@ -1246,7 +1252,7 @@ static void asmc_sms_handler(void *arg) { struct asmc_softc *sc = device_get_softc(arg); - + asmc_sms_task(sc, 0); } #endif @@ -1293,7 +1299,7 @@ asmc_sms_task(void *arg, int pending) } snprintf(notify, sizeof(notify), " notify=0x%x", type); - devctl_notify("ACPI", "asmc", "SMS", notify); + devctl_notify("ACPI", "asmc", "SMS", notify); } static int @@ -1363,11 +1369,11 @@ asmc_mbp_sysctl_light_right(SYSCTL_HANDL uint8_t buf[6]; int error; int32_t v; - + asmc_key_read(dev, ASMC_KEY_LIGHTRIGHT, buf, sizeof buf); v = buf[2]; error = sysctl_handle_int(oidp, &v, 0, req); - + return (error); } Modified: head/sys/dev/asmc/asmcvar.h ============================================================================== --- head/sys/dev/asmc/asmcvar.h Fri Feb 17 17:52:12 2017 (r313879) +++ head/sys/dev/asmc/asmcvar.h Fri Feb 17 18:49:18 2017 (r313880) @@ -76,7 +76,7 @@ struct asmc_softc { /* Number of keys */ -#define ASMC_NKEYS "#KEY" /* RO; 4 bytes */ +#define ASMC_NKEYS "#KEY" /* RO; 4 bytes */ /* * Fan control via SMC. @@ -154,7 +154,7 @@ struct asmc_softc { #define ASMC_MB31_TEMPDESCS { "Enclosure Bottomside", \ "Northbridge Point 1", \ "Heatsink 1","Heatsink 2" \ - "Memory Bank A", } + "Memory Bank A", } #define ASMC_MBP_TEMPS { "TB0T", "Th0H", "Th1H", "Tm0P", \ "TG0H", "TG0P", "TG0T", NULL } @@ -167,7 +167,7 @@ struct asmc_softc { "Heatsink 1", "Heatsink 2", \ "Memory Controller", \ "Graphics Chip", "Graphics Heatsink", \ - "Unknown", } + "Unknown", } #define ASMC_MBP4_TEMPS { "TB0T", "Th0H", "Th1H", "Th2H", "Tm0P", \ "TG0H", "TG0D", "TC0D", "TC0P", "Ts0P", \ @@ -186,13 +186,13 @@ struct asmc_softc { "Graphics Chip Diode", \ "CPU Temperature Diode", "CPU Point 2", \ "Unknown", "Unknown", \ - "Wireless Module", } + "Wireless Module", } #define ASMC_MBP5_TEMPS { "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", \ "TC0F", "TC0P", "TG0D", "TG0F", "TG0H", \ "TG0P", "TG0T", "TG1H", "TN0D", "TN0P", \ "TTF0", "Th2H", "Tm0P", "Ts0P", "Ts0S", \ - NULL } + NULL } #define ASMC_MBP5_TEMPNAMES { "enclosure_bottom_0", "enclosure_bottom_1", \ "enclosure_bottom_2", "enclosure_bottom_3", \ @@ -203,7 +203,7 @@ struct asmc_softc { "gpu_2_heatsink", "northbridge_diode", \ "northbridge_pin", "unknown", \ "heatsink_2", "memory_controller", \ - "pci_express_slot_pin", "pci_express_slot_unk" } + "pci_express_slot_pin", "pci_express_slot_unk" } #define ASMC_MBP5_TEMPDESCS { "Enclosure Bottom 0", "Enclosure Bottom 1", \ "Enclosure Bottom 2", "Enclosure Bottom 3", \ @@ -214,30 +214,57 @@ struct asmc_softc { "GPU 2 Heatsink", "Northbridge Diode", \ "Northbridge Pin", "Unknown", \ "Heatsink 2", "Memory Controller", \ - "PCI Express Slot Pin", "PCI Express Slot (unk)" } + "PCI Express Slot Pin", "PCI Express Slot (unk)" } #define ASMC_MBP8_TEMPS { "TB0T", "TB1T", "TB2T", "TC0C", "TC0D", \ "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \ "TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \ "TCTD", "TG0D", "TG0P", "THSP", "TM0S", \ "TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \ - "Th2H", "Tm0P", "Ts0P", "Ts0S", NULL } + "Th2H", "Tm0P", "Ts0P", "Ts0S", NULL } #define ASMC_MBP8_TEMPNAMES { "enclosure", "TB1T", "TB2T", "TC0C", "TC0D", \ "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \ "TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \ "TCTD", "graphics", "TG0P", "THSP", "TM0S", \ "TMBS", "TP0P", "TPCD", "wireless", "Th1H", \ - "Th2H", "memory", "Ts0P", "Ts0S" } + "Th2H", "memory", "Ts0P", "Ts0S" } #define ASMC_MBP8_TEMPDESCS { "Enclosure Bottomside", "TB1T", "TB2T", "TC0C", "TC0D", \ "TC0E", "TC0F", "TC0P", "TC1C", "TC2C", \ "TC3C", "TC4C", "TCFC", "TCGC", "TCSA", \ "TCTD", "TG0D", "TG0P", "THSP", "TM0S", \ "TMBS", "TP0P", "TPCD", "TW0P", "Th1H", \ - "Th2H", "Tm0P", "Ts0P", "Ts0S" } + "Th2H", "Tm0P", "Ts0P", "Ts0S" } + +#define ASMC_MBP112_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ + "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ + "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ + "TCXC", "TH0A", "TH0B", "TH0F", "TH0R", \ + "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \ + "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ + "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ + "Ts1S", NULL } + +#define ASMC_MBP112_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ + "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ + "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ + "TCXC", "TH0A", "TH0B", "TH0F", "TH0R", \ + "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \ + "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ + "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ + "Ts1S" } + +#define ASMC_MBP112_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ + "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ + "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ + "TCXC", "TH0A", "TH0B", "TH0F", "TH0R", \ + "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \ + "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ + "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ + "Ts1S" } -#define ASMC_MBP11_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ +#define ASMC_MBP113_TEMPS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ "TCXC", "TG0D", "TG0P", "TG1D", "TG1F", \ @@ -245,9 +272,9 @@ struct asmc_softc { "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \ "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ - "Ts1S", NULL } + "Ts1S", NULL } -#define ASMC_MBP11_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ +#define ASMC_MBP113_TEMPNAMES { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ "TCXC", "TG0D", "TG0P", "TG1D", "TG1F", \ @@ -255,9 +282,9 @@ struct asmc_softc { "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \ "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ - "Ts1S" } + "Ts1S" } -#define ASMC_MBP11_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ +#define ASMC_MBP113_TEMPDESCS { "TB0T", "TB1T", "TB2T", "TBXT", "TC0E", \ "TC0F", "TC0P", "TC1C", "TC2C", "TC3C", \ "TC4C", "TCFC", "TCGC", "TCSA", "TCTD", \ "TCXC", "TG0D", "TG0P", "TG1D", "TG1F", \ @@ -265,7 +292,8 @@ struct asmc_softc { "TH0V", "TH0a", "TH0b", "TH0c", "TM0P", \ "TM0S", "TP0P", "TPCD", "TW0P", "Ta0P", \ "TaSP", "Th1H", "Th2H", "Ts0P", "Ts0S", \ - "Ts1S" } + "Ts1S" } + #define ASMC_MM_TEMPS { "TN0P", "TN1P", NULL } #define ASMC_MM_TEMPNAMES { "northbridge1", "northbridge2" }