From owner-p4-projects@FreeBSD.ORG Thu Mar 6 19:51:15 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id D4C451065677; Thu, 6 Mar 2008 19:51:14 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 94D081065675 for ; Thu, 6 Mar 2008 19:51:14 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 83BBD8FC1E for ; Thu, 6 Mar 2008 19:51:14 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m26JpExK034838 for ; Thu, 6 Mar 2008 19:51:14 GMT (envelope-from rrs@cisco.com) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m26JpEBb034836 for perforce@freebsd.org; Thu, 6 Mar 2008 19:51:14 GMT (envelope-from rrs@cisco.com) Date: Thu, 6 Mar 2008 19:51:14 GMT Message-Id: <200803061951.m26JpEBb034836@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to rrs@cisco.com using -f From: "Randall R. Stewart" To: Perforce Change Reviews Cc: Subject: PERFORCE change 137020 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Mar 2008 19:51:15 -0000 http://perforce.freebsd.org/chv.cgi?CH=137020 Change 137020 by rrs@rrs-mips2-jnpr on 2008/03/06 19:50:45 Don't blast 0 in carefully disable ints and preserve the rest of the SR. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#16 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips/swtch.S#16 (text+ko) ==== @@ -172,20 +172,23 @@ lw a1, PC_CURPCB(a1) 1: - .set noat - li v0, SR_EXL + mfc0 v0, COP_0_STATUS_REG # set exeption level bit. + or v0, SR_EXL + and v0, ~(SR_INT_ENAB) mtc0 v0, COP_0_STATUS_REG # set exeption level bit. nop nop nop nop - RESTORE_U_PCB_REG(t0, MULLO, a1) - RESTORE_U_PCB_REG(t1, MULHI, a1) + .set noat + move k1, a1 + RESTORE_U_PCB_REG(t0, MULLO, k1) + RESTORE_U_PCB_REG(t1, MULHI, k1) mtlo t0 mthi t1 - RESTORE_U_PCB_REG(a0, PC, a1) - RESTORE_U_PCB_REG(AT, AST, a1) - RESTORE_U_PCB_REG(v0, V0, a1) + RESTORE_U_PCB_REG(a0, PC, k1) + RESTORE_U_PCB_REG(AT, AST, k1) + RESTORE_U_PCB_REG(v0, V0, k1) _MTC0 a0, COP_0_EXC_PC # set return address /* @@ -193,7 +196,6 @@ * after interrupts are disabled. Otherwise it will get overwritten * by the interrupt code. */ - move k1, a1 RESTORE_U_PCB_REG(v1, V1, k1) RESTORE_U_PCB_REG(a0, A0, k1) RESTORE_U_PCB_REG(a1, A1, k1) @@ -267,8 +269,7 @@ mfc0 t0, COP_0_STATUS_REG # t0 = saved status register nop nop - - and a3, t0, SR_KX + and a3, t0, ~(SR_INT_ENAB) mtc0 a3, COP_0_STATUS_REG # Disable all interrupts ITLBNOPFIX j mips_sw1 # We're not interested in old @@ -287,7 +288,7 @@ mfc0 t0, COP_0_STATUS_REG # t0 = saved status register nop nop - and a3, t0, SR_KX + and a3, t0, ~(SR_INT_ENAB) mtc0 a3, COP_0_STATUS_REG # Disable all interrupts ITLBNOPFIX beqz a0, mips_sw1