From owner-freebsd-stable@FreeBSD.ORG Mon Aug 9 14:38:18 2004 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id E9D6716A4CE for ; Mon, 9 Aug 2004 14:38:18 +0000 (GMT) Received: from ux11.ltcm.net (ux11.ltcm.net [64.215.98.6]) by mx1.FreeBSD.org (Postfix) with ESMTP id 39EFA43D3F for ; Mon, 9 Aug 2004 14:38:18 +0000 (GMT) (envelope-from mipam@ibb.net) Received: from ux11.ltcm.net (mipam@localhost.ltcm.net [IPv6:::1]) by ux11.ltcm.net (8.12.9/8.12.9/UX11TT) with ESMTP id i79EcGIo016647 for ; Mon, 9 Aug 2004 16:38:16 +0200 (MEST) Received: from localhost (mipam@localhost) by ux11.ltcm.net (8.12.9/8.12.9/Submit) with ESMTP id i79EcE5k004855 for ; Mon, 9 Aug 2004 16:38:15 +0200 (MEST) X-Authentication-Warning: ux11.ltcm.net: mipam owned process doing -bs Date: Mon, 9 Aug 2004 16:38:14 +0200 (MEST) From: Mipam X-X-Sender: mipam@ux11.ltcm.net To: freebsd-stable@freebsd.org Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Subject: 82541 Gi + device polling X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Aug 2004 14:38:19 -0000 Hi, I saw that the 82541 GI intel card is supported: dev/em/if_em_hw.h:#define E1000_DEV_ID_82541GI 0x1076 in 5.2.1 However, with lots of traffic, lots of interrupts are being generated and so lots of cpu power is consumed. Device polling would be a nice way around this. However, in the machine which contains these cards, SMP is enabled, cause its a hyperthreading machine. I saw that device polling is not possible with smp enabled? And irq mitigation is also not included in these cards, so the old interrupt problem is still present with the modern card then? I think that the amount of interrupts consume more cpu, than calculation of checksums. Maybe im wrong in this? Any idea why intel quitted irq mitigation. A combination of irq mitigation and checksum offloading would really save cpu cycles. Bye, Mipam.