Date: Sun, 31 Mar 2013 22:42:26 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r248961 - head/sys/arm/arm Message-ID: <201303312242.r2VMgQqU018790@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: ian Date: Sun Mar 31 22:42:25 2013 New Revision: 248961 URL: http://svnweb.freebsd.org/changeset/base/248961 Log: When running on armv6, set alignment checking to modulo-4 mode rather than modulo-8, because clang emits ldrd and strd instructions for addresses that are only 4-byte aligned. Modified: head/sys/arm/arm/locore.S Modified: head/sys/arm/arm/locore.S ============================================================================== --- head/sys/arm/arm/locore.S Sun Mar 31 20:40:06 2013 (r248960) +++ head/sys/arm/arm/locore.S Sun Mar 31 22:42:25 2013 (r248961) @@ -176,10 +176,16 @@ Lunmapped: /* Set the Domain Access register. Very important! */ mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT) mcr p15, 0, r0, c3, c0, 0 - /* Enable MMU */ + /* + * Enable MMU. + * On armv6 enable extended page tables, and set alignment checking + * to modulo-4 (CPU_CONTROL_UNAL_ENABLE) for the ldrd/strd + * instructions emitted by clang. + */ mrc p15, 0, r0, c1, c0, 0 -#if defined(CPU_ARM1136) || defined(CPU_ARM1176) || defined(CPU_CORTEXA) || defined(CPU_MV_PJ4B) - orr r0, r0, #CPU_CONTROL_V6_EXTPAGE +#ifdef _ARM_ARCH_6 + orr r0, r0, #(CPU_CONTROL_V6_EXTPAGE | CPU_CONTROL_UNAL_ENABLE) + orr r2, r2, #(CPU_CONTROL_AFLT_ENABLE) #endif orr r0, r0, #(CPU_CONTROL_MMU_ENABLE) mcr p15, 0, r0, c1, c0, 0
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201303312242.r2VMgQqU018790>