Date: Wed, 6 Dec 2000 12:25:59 GMT From: wkb@freebie.demon.nl To: Andrew Gallatin <gallatin@cs.duke.edu>, Wilko Bulte <wkb@freebie.demon.nl>, Daniel Nilsson <daniel.n.nilsson@home.se>, freebsd-alpha@freebsd.org Subject: Re: Mikasa boot problems Message-ID: <E143de3-0004F5-00@post.mail.nl.demon.net>
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>
> Wilko Bulte writes:
> > > I ported the AS1000/AS1000A support from NetBSD. I don't think the
> > > 1000A support has been tested yet.
> >
> > Go and washed thou mouth with soap..!
> >
> > I have 4.2-something running on a AS1000A at work. Actually I use it as my
> > FreeBSD-builder. Mine is a EV5/400 BTW.
> >
> > So, I don't understand why mine has worked for a long time now..
>
> Actually, the problem is worse than I thought. I think your machine
> works only because we've been lucky.
>
> As things stand now, I think only ev4 1000's and ev5 1000a's will
> work, because I misread the NetBSD source code. It turns out the
> chipset is dependant on the CPU and the interrupt hardware is
> dependant on the systype.
>
Ouch.. I don't have an EV4 Mikasa, only EV5 AS1000A. This is yet another
good point for ensuring we have a better test coverage in place. Meaning at least 2
testers for a specific piece of hardware.
Chipsets are indeed different IIRC. At least the memory setup is, sets of
5 SIMMs for Mikasa and sets of 4 for 1000A.
Might be a good idea to test this patch and put updated 4.2-post-R
bootfloppies up for ftp if it fixes the problem.
Wilko
> See the appended patch to see what I mean.
>
> Drew
>
> Index: alpha/alpha/dec_1000a.c
> ===================================================================
> RCS file: /home/ncvs/src/sys/alpha/alpha/dec_1000a.c,v
> retrieving revision 1.2.2.2
> diff -u -r1.2.2.2 dec_1000a.c
> --- alpha/alpha/dec_1000a.c 2000/07/20 06:12:12 1.2.2.2
> +++ alpha/alpha/dec_1000a.c 2000/12/06 00:55:11
> @@ -146,6 +146,15 @@
> case PCS_PROC_EV4:
> case PCS_PROC_EV45:
> platform.iobus = "apecs";
> + break;
> +
> + default:
> + platform.iobus = "cia";
> + break;
> + }
> + platform.cons_init = dec_1000a_cons_init;
> + switch (cputype) {
> + case ST_DEC_1000:
> platform.pci_intr_map = dec_1000_intr_map;
> platform.pci_intr_disable = dec_1000_intr_disable;
> platform.pci_intr_enable = dec_1000_intr_enable;
> @@ -153,14 +162,13 @@
> break;
>
> default:
> - platform.iobus = "cia";
> platform.pci_intr_map = dec_1000a_intr_map;
> platform.pci_intr_disable = dec_1000a_intr_disable;
> platform.pci_intr_enable = dec_1000a_intr_enable;
> platform.pci_intr_init = dec_1000a_intr_init;
> break;
> }
> - platform.cons_init = dec_1000a_cons_init;
> +
> }
>
> /* XXX for forcing comconsole when srm serial console is used */
> @@ -401,5 +409,5 @@
> /*
> * Enable cascade interrupt.
> */
> - dec_1000_intr_enable(2);
> + dec_1000a_intr_enable(2);
> }
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