From owner-freebsd-mips@FreeBSD.ORG Wed Aug 18 02:05:03 2010 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0EF7B106566B; Wed, 18 Aug 2010 02:05:03 +0000 (UTC) (envelope-from neelnatu@gmail.com) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx1.freebsd.org (Postfix) with ESMTP id 712138FC08; Wed, 18 Aug 2010 02:05:01 +0000 (UTC) Received: by wwb24 with SMTP id 24so46145wwb.31 for ; Tue, 17 Aug 2010 19:05:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=nVUwXud2UJAlExXLHx17zMJ7+D7jQkjd+pPObI5DkAY=; b=lBl/PSO6sdxO2yB+5sXJsaBdH6Qv7p/3gXeys63+th+IvMgc96ueKP0NKkOBXU46Ap oiNOlWaW39so7sOhx6NiYGJJm+7BIUeRfLy35phMjt9lzSzMPS2lbXsxIfeoIi78Wve8 xmXqRvMgUigVmSwec8BYejnPtTSED/RwTDEIY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=E1okXBWXS7OHtUzzOo1/pfR0DPXIxJGtB/Y9S7i5anktyveiAxuZUo1o6+sFGeYR0g jFdFVOK4W59LAoyDCZICdiFCGrksHxLXcpYGtNBKc/mT1cgK/Vwz3lymtg22+O/BGzpQ QPjcxScJDZb8G89JAixfBghbJ0lwA/qpmxv2k= MIME-Version: 1.0 Received: by 10.216.164.21 with SMTP id b21mr1480400wel.28.1282097101251; Tue, 17 Aug 2010 19:05:01 -0700 (PDT) Received: by 10.216.80.8 with HTTP; Tue, 17 Aug 2010 19:05:01 -0700 (PDT) In-Reply-To: References: Date: Tue, 17 Aug 2010 19:05:01 -0700 Message-ID: From: Neel Natu To: "Jayachandran C." Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: Alan Cox , freebsd-mips@freebsd.org Subject: Re: [PATCH] Move from kseg0 to xkphys for 64 bit. X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 Aug 2010 02:05:03 -0000 Hi JC, I have a few comments below. Index: sys/mips/include/cpuregs.h =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +#define MIPS_XKPHYS_LARGEST_PHYS 0x10000000000 +#define MIPS_XKPHYS_MASK 0x0ffffffffff Perhaps add a comment that this limit is less than that allowed by the architecture because we can only address 40 bits with our 3 levels of page tables. Don't these macros need a 'ULL' type qualifier as well? Index: sys/mips/mips/pmap.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Do you need to maintain 'valid1' in 'local_sysmap' anymore? It seems we only check 'valid2' in pmap_lmem_unmap(). static __inline pd_entry_t * pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va) { + return pdpe; } static __inline pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va) { + return pmap_segmap(pmap, va); } Parentheses around the return value. @@ -1032,7 +1080,11 @@ pmap_grow_pte_page_cache() { +#ifdef __mips_n64 + vm_contig_grow_cache(3, 0, 0xffffffffffUL); +#else vm_contig_grow_cache(3, 0, MIPS_KSEG0_LARGEST_PHYS); +#endif } Why not use MIPS_XPHYS_LARGEST_PHYS in the __mips_n64 case instead of using a literal value? best Neel On Mon, Aug 16, 2010 at 9:10 AM, Jayachandran C. wrote: > I've attached the changes to move the 64bit port to use 64bit XKPHYS > mapping of the physical memory instead of the current KSEG0. =A0With > this changes the 64bit port will use just one freelist, and can > allocate page table pages from anywhere in the memory. > > The changes are mainly to introduce macros like > MIPS_PHYS_TO_DIRECT(pa), MIPS_DIRECT_TO_PHYS(), which will use KSEG0 > in 32 bit compilation and XKPHYS in 64 bit compilation. I also ended > up changing the macro based PMAP_LMEM_MAP1(), PMAP_LMEM_MAP2(), > PMAP_LMEM_UNMAP() to inline functions. > > I have also introduced a macro MIPS_DIRECT_MAPPABLE(pa), which will > further reduce the cases in which we will need to have a special case > for 64 bit compilation. > > Please let me know your comments. > > Thanks, > JC. >