Date: Fri, 5 Apr 2013 01:38:14 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r249124 - head/sys/mips/conf Message-ID: <201304050138.r351cEdl081700@svn.freebsd.org>
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Author: adrian Date: Fri Apr 5 01:38:13 2013 New Revision: 249124 URL: http://svnweb.freebsd.org/changeset/base/249124 Log: Add AP121 ethernet / switch PHY support. * arge0 is MII * arge1 is GMII * the MDIO bus is on arge1, not arge0 * the default switch config is to have ports 0-3 as the switch group, with port 4 being an external PHY dedicated to arge0 (ie, 'cpu' port.) Whilst I'm here, remove unused bits and pieces from the config. Tested: * AP121, ping on both arge0 and arge1 * Tested switch port detection using etherswitchcfg Modified: head/sys/mips/conf/AP121 head/sys/mips/conf/AP121.hints Modified: head/sys/mips/conf/AP121 ============================================================================== --- head/sys/mips/conf/AP121 Fri Apr 5 01:35:59 2013 (r249123) +++ head/sys/mips/conf/AP121 Fri Apr 5 01:38:13 2013 (r249124) @@ -18,7 +18,7 @@ ident AP121 hints "AP121.hints" # Force the board memory - the base AP121 only has 16MB RAM -options AR71XX_REALMEM=16*1024*1024 +options AR71XX_REALMEM=(16*1024*1024) # i2c GPIO bus #device gpioiic @@ -26,11 +26,12 @@ options AR71XX_REALMEM=16*1024*1 #device iicbus #device iic -# ethernet switch device -#device etherswitch +# Options required for miiproxy and mdiobus +options ARGE_MDIO # Export an MDIO bus separate from arge +device miiproxy # MDIO bus <-> MII PHY rendezvous -# RTL8366RB support -#device rtl8366rb +device etherswitch +device arswitch # read MSDOS formatted disks - USB #options MSDOSFS Modified: head/sys/mips/conf/AP121.hints ============================================================================== --- head/sys/mips/conf/AP121.hints Fri Apr 5 01:35:59 2013 (r249123) +++ head/sys/mips/conf/AP121.hints Fri Apr 5 01:38:13 2013 (r249124) @@ -3,21 +3,28 @@ # # $FreeBSD$ -# Hard-code the PHY for now, until there's switch phy support. -# hint.arge.0.phymask=0x000c -hint.arge.0.phymask=0x0000 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -# Where is the MAC address stored in flash for this particular unit. -hint.arge.0.eeprommac=0x1f01fc00 - -# This isn't used, but configure it anyway. -# This should eventually just not be configured, but the if then -# needs to be properly disabled or spurious interrupts occur. -hint.arge.1.phymask=0x0 - -# Where the ART is -# hint.ath.0.eepromaddr=0x1fff1000 +# mdiobus on arge1 +hint.argemdio.0.at="nexus0" +hint.argemdio.0.maddr=0x1a000000 +hint.argemdio.0.msize=0x1000 +hint.argemdio.0.order=0 + +# Embedded Atheros Switch +hint.arswitch.0.at="mdio0" +hint.arswitch.0.is_7240=1 +hint.arswitch.0.numphys=4 +hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY +hint.arswitch.0.is_rgmii=0 +hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII + +# arge0 - MII, autoneg, phy(4) +hint.arge.0.phymask=0x10 # PHY4 +hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus + +# arge1 - GMII, 1000/full +hint.arge.1.phymask=0x0 # No directly mapped PHYs +hint.arge.1.media=1000 +hint.arge.1.fduplex=1 # The AP121 4MB flash layout: # @@ -114,17 +121,3 @@ hint.gpio.0.pinmask=0x0 #hint.gpioled.3.at="gpiobus0" #hint.gpioled.3.name="wlan" #hint.gpioled.3.pins=0x0200 - -# GPIO I2C bus -#hint.gpioiic.0.at="gpiobus0" -#hint.gpioiic.0.pins=0xc0000 -#hint.gpioiic.0.scl=1 -#hint.gpioiic.0.sda=0 - -# I2C bus -# Don't be strict about I2C protocol - the relaxed semantics are required -# by the realtek switch PHY. -# hint.iicbus.0.strict=0 - -# Bit bang bus - override default delay -#hint.iicbb.0.udelay=3
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