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Date:      Wed, 27 Aug 1997 23:18:37 -0700 (PDT)
From:      Simon Shapiro <Shimon@i-connect.net>
To:        Peter Wemm <peter@spinner.dialix.com.au>
Cc:        Christopher Petrilli <petrilli@amber.org>, smp@FreeBSD.ORG, Peter Stubbs <peters@gil.com.au>, Kyle Mestery <mestery@winternet.com>
Subject:   Re: A how does it work question.
Message-ID:  <XFMail.970827231837.Shimon@i-Connect.Net>
In-Reply-To: <199708280442.MAA19432@spinner.dialix.com.au>

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Hi Peter Wemm;  On 28-Aug-97 you wrote: 
>  Simon Shapiro wrote:
> > 
> > Hi Christopher Petrilli;  On 27-Aug-97 you wrote: 
> > >  In the end, I would think that software would be the conjstriction
> > >  point
> > >  (in fact seperate memory makes it an MPP system, not an AMP/SMP
> > >  system).
> > >  This is the concept behind ccNUMA, etc... 
> > >  
> > >  Because of the nature of the FreeBSD kernel (and I suppose the
> > >  probably
> > >  applies to Linux, but don't know), all I/O is threaded thru the #0
> > >  CPU,
> > >  and thereby it becomes a HUGE bottleneck.
> > 
> > Correct.  I built a Z-80 system like that in 1980.  Worked well because
> > CPU 
> > cycles were in short supply.  Disks were amazingly similar to today`s.
> > 
> > Simon
>  
>  Again, no, this is not correct.  All cpu's share the IO, interrupt,
>  scheduling etc load evenly.  Once the FreeBSD kernel is running in SMP
>  mode, there is no difference at all in behavior between the cpus except
>  that only cpu#0 will do a final shutdown and reset of the system (an
>  MPSPEC requirement).

My English is bad, my expression ability is horrible.  What I did mean
above is ``Yes, what you describe is an Asymmetrical MP''.  No, I did not
mean to imply that this is how FreeBSD works.  I know it is symetrical.
We called it ``coarse grained''.  Now it is rapidly marching towards
``fine grained'' with some lively discussion on how to do it correctly.
BTW, I feel Terry is 100% with it on this subject.

>  Interrupt handling is interleaved between cpus, but if a cpu is "in" the
>  kernel when an interrupt happens, it will handle the interrupt.  This is
>  because (for the moment), when one cpu is executing code inside the
>  giant 
>  lock, the other cpu cannot get into the kernel to service interrupts 
>  (except for fast interrupts for sio/cy).
>  
>  It's fully symmetric (all cpu's are equal), just not reentrant enough in
>  general (yet).
>  
>  (However, I vaguely recall something about NMI only being handled on the
>  BSP though)

Of course you are right.  I will not mention my contribution to the concept
of ``giant lock''.  But trust that I understand it, although I may not be
able to say so in a streight sentence :-)

Now, ffs is a different story :-)

Simon



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