From owner-freebsd-hardware Tue Feb 25 22:34:07 1997 Return-Path: Received: (from root@localhost) by freefall.freebsd.org (8.8.5/8.8.5) id WAA19804 for hardware-outgoing; Tue, 25 Feb 1997 22:34:07 -0800 (PST) Received: from dfw-ix12.ix.netcom.com (dfw-ix12.ix.netcom.com [206.214.98.12]) by freefall.freebsd.org (8.8.5/8.8.5) with ESMTP id WAA19797 for ; Tue, 25 Feb 1997 22:34:02 -0800 (PST) Received: (from smap@localhost) by dfw-ix12.ix.netcom.com (8.8.4/8.8.4) id AAA17253; Wed, 26 Feb 1997 00:32:57 -0600 (CST) Received: from wck-ca5-07.ix.netcom.com(199.35.213.167) by dfw-ix12.ix.netcom.com via smap (V1.3) id sma017097; Wed Feb 26 00:31:46 1997 Received: (from asami@localhost) by silvia.HIP.Berkeley.EDU (8.8.5/8.6.9) id WAA01627; Tue, 25 Feb 1997 22:31:36 -0800 (PST) Date: Tue, 25 Feb 1997 22:31:36 -0800 (PST) Message-Id: <199702260631.WAA01627@silvia.HIP.Berkeley.EDU> To: matt@lkg.dec.com CC: jin@george.lbl.gov, freebsd-hardware@freebsd.org In-reply-to: <3.0.32.19970225205045.006884cc@netrix.lkg.dec.com> (message from Matt Thomas on Tue, 25 Feb 1997 20:52:37 -0500) Subject: Re: Memory speed of P6-200 (256k) From: asami@vader.cs.berkeley.edu (Satoshi Asami) Sender: owner-hardware@freebsd.org X-Loop: FreeBSD.org Precedence: bulk * >} At 12:48 PM 2/25/97 -0800, Jin Guojun[ITG] wrote: * >} >The PCI is a 64-bit wide bus. The maxmimum memory speed you can get from * >} >this bus is 1000000000 * 8 / 60ns = 133333333 Bytes/sec (no inteleave). This is totally bogus. The "60ns" is just the row access time, i.e., the time it takes for the data lines to stabilize after you send a request to the memory. There is much more in memory bandwidth than just row access time. For starters, there is fast page mode (FPM: get more words from the same row in memory for only about half the time for row access) and cycle time (the interval between accesses to different rows usually require about twice the row access time). So, for instance, if your memory system and chipset transfers 64 bits at a time (like P5 or P6), and you can get 64 bytes (8 x 64 bits) maximum using FPM, your max memory transfer speed will be: +----------------------- number of bytes transferred | | +----------------- time it takes to read the first word (64 bits) | | | | +---------- time it takes to read the next 7 words | | | | | | +--- cycle time - row access time | | | | (penalty for going to next row) v v vvvvv v 64 / (60 + 30 * 7 + 60) * 10^9 =~ 194 MB/s I'm not sure how many bytes the Triton can read using FPM, so the above is just an example. Also, the above times are in nanoseconds, and if your memory bus is running at 66MHz, each of them will have to be rounded up to the next multiple of 15ns (ok, they already are, but now you know why you don't want to buy a 60MHz machine). Note that this is a one-way speed out of the memory, so if you are copying from memory to memory, you will probably have to halve this (I'm not sure about the write speed, though). By the way, the fastest memory copy I've seen so far is 87MB/s (or 174MB/s in and out) on a P5-166 with EDO memory. (See http://now.cs.berkeley.edu/Td/bcopy.html for more.) Matt Thomas replies: * >} 64 bit PCI doubles that maximum to 265MB/s. Does anyone know about 66MHz PCI? I've seen it in the standards.... * The main memory access may be done through a PCI host bridge, but that * does not mean that's it done through the PCI. A system/cpu may have Yes. These chips are usually identified as: chip0 rev 2 on pci0:0:0 and chip0 rev 1 on pci0:0:0 and such. Satoshi