Date: Mon, 25 Jul 2011 16:45:48 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r224333 - in user/jchandra/mips-xlp-support/sys/mips: conf nlm nlm/hal Message-ID: <201107251645.p6PGjmOb065567@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: jchandra Date: Mon Jul 25 16:45:47 2011 New Revision: 224333 URL: http://svn.freebsd.org/changeset/base/224333 Log: Add PCI and USB support for Netlogic XLP boards. Remove iodi.c Use the PCI code and some fixups to handle internal PCI like bus. Added: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pcibus.h user/jchandra/mips-xlp-support/sys/mips/nlm/hal/usb.h user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c - copied unchanged from r224008, user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_mips_xlp.c user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Deleted: user/jchandra/mips-xlp-support/sys/mips/nlm/iodi.c user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_mips_xlp.c Modified: user/jchandra/mips-xlp-support/sys/mips/conf/XLP user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 user/jchandra/mips-xlp-support/sys/mips/nlm/files.xlp user/jchandra/mips-xlp-support/sys/mips/nlm/hal/iomap.h Modified: user/jchandra/mips-xlp-support/sys/mips/conf/XLP ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/conf/XLP Mon Jul 25 16:45:12 2011 (r224332) +++ user/jchandra/mips-xlp-support/sys/mips/conf/XLP Mon Jul 25 16:45:47 2011 (r224333) @@ -86,8 +86,16 @@ device md device pty device bpf -# UART +# Needed devices device uart +device pci # Network device ether + +device da +device scbus + +device usb +device ehci +device umass Modified: user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 Mon Jul 25 16:45:12 2011 (r224332) +++ user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 Mon Jul 25 16:45:47 2011 (r224333) @@ -90,6 +90,14 @@ device bpf # UART device uart +device pci # Network device ether + +device da +device scbus + +device usb +device ehci +device umass Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/files.xlp ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/files.xlp Mon Jul 25 16:45:12 2011 (r224332) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/files.xlp Mon Jul 25 16:45:47 2011 (r224333) @@ -3,10 +3,12 @@ mips/nlm/hal/fmn.c standard mips/nlm/xlp_machdep.c standard mips/nlm/intr_machdep.c standard mips/nlm/tick.c standard -mips/nlm/iodi.c standard mips/nlm/board.c standard mips/nlm/cms.c standard -mips/nlm/bus_space_rmi.c standard +mips/nlm/bus_space_rmi.c standard mips/nlm/mpreset.S standard -mips/nlm/uart_bus_xlp_iodi.c optional uart -mips/nlm/uart_cpu_mips_xlp.c optional uart +mips/nlm/xlp_pci.c optional pci +mips/nlm/intern_dev.c optional pci +mips/nlm/uart_pci_xlp.c optional uart +mips/nlm/uart_cpu_xlp.c optional uart +mips/nlm/usb_init.c optional usb Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/iomap.h ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/hal/iomap.h Mon Jul 25 16:45:12 2011 (r224332) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/iomap.h Mon Jul 25 16:45:47 2011 (r224333) @@ -12,11 +12,11 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * + * * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS @@ -39,9 +39,9 @@ /* ---------------------------------- * XLP RESET Physical Address Map * ---------------------------------- - * PCI ECFG : 0x18000000 - 0x1bffffff - * PCI CFG : 0x1c000000 - 0x1cffffff - * FLASH : 0x1fc00000 - 0x1fffffff + * PCI ECFG : 0x18000000 - 0x1bffffff + * PCI CFG : 0x1c000000 - 0x1cffffff + * FLASH : 0x1fc00000 - 0x1fffffff * ---------------------------------- */ @@ -124,6 +124,27 @@ #define XLP_PCI_UCODEINFO_REG 0x3e #define XLP_PCI_SBB_WT_REG 0x3f + +#define PCI_VENDOR_NETLOGIC 0x184e +#define PCI_DEVICE_ID_NLM_ROOT 0x1001 +#define PCI_DEVICE_ID_NLM_ICI 0x1002 +#define PCI_DEVICE_ID_NLM_PIC 0x1003 +#define PCI_DEVICE_ID_NLM_PCIE 0x1004 +#define PCI_DEVICE_ID_NLM_EHCI 0x1007 +#define PCI_DEVICE_ID_NLM_ILK 0x1008 +#define PCI_DEVICE_ID_NLM_NAE 0x1009 +#define PCI_DEVICE_ID_NLM_POE 0x100A +#define PCI_DEVICE_ID_NLM_FMN 0x100B +#define PCI_DEVICE_ID_NLM_RAID 0x100D +#define PCI_DEVICE_ID_NLM_SAE 0x100D +#define PCI_DEVICE_ID_NLM_RSA 0x100E +#define PCI_DEVICE_ID_NLM_CMP 0x100F +#define PCI_DEVICE_ID_NLM_UART 0x1010 +#define PCI_DEVICE_ID_NLM_I2C 0x1011 +#define PCI_DEVICE_ID_NLM_NOR 0x1015 +#define PCI_DEVICE_ID_NLM_NAND 0x1016 +#define PCI_DEVICE_ID_NLM_MMC 0x1018 + #if !defined(LOCORE) && !defined(__ASSEMBLY__) #ifndef __NLM_NLMIO_H__ Added: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pcibus.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/pcibus.h Mon Jul 25 16:45:47 2011 (r224333) @@ -0,0 +1,87 @@ +/*- + * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights + * reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * NETLOGIC_BSD */ + +#ifndef __XLP_PCIBUS_H__ +#define __XLP_PCIBUS_H__ + +#define MSI_MIPS_ADDR_BASE 0xfee00000 +/* MSI support */ +#define MSI_MIPS_ADDR_DEST 0x000ff000 +#define MSI_MIPS_ADDR_RH 0x00000008 +#define MSI_MIPS_ADDR_RH_OFF 0x00000000 +#define MSI_MIPS_ADDR_RH_ON 0x00000008 +#define MSI_MIPS_ADDR_DM 0x00000004 +#define MSI_MIPS_ADDR_DM_PHYSICAL 0x00000000 +#define MSI_MIPS_ADDR_DM_LOGICAL 0x00000004 + +/* Fields in data for Intel MSI messages. */ +#define MSI_MIPS_DATA_TRGRMOD 0x00008000 /* Trigger mode */ +#define MSI_MIPS_DATA_TRGREDG 0x00000000 /* edge */ +#define MSI_MIPS_DATA_TRGRLVL 0x00008000 /* level */ + +#define MSI_MIPS_DATA_LEVEL 0x00004000 /* Polarity. */ +#define MSI_MIPS_DATA_DEASSERT 0x00000000 +#define MSI_MIPS_DATA_ASSERT 0x00004000 + +#define MSI_MIPS_DATA_DELMOD 0x00000700 /* Delivery Mode */ +#define MSI_MIPS_DATA_DELFIXED 0x00000000 /* fixed */ +#define MSI_MIPS_DATA_DELLOPRI 0x00000100 /* lowest priority */ + +#define MSI_MIPS_DATA_INTVEC 0x000000ff + +/* + * Build Intel MSI message and data values from a source. AMD64 systems + * seem to be compatible, so we use the same function for both. + */ +#define MIPS_MSI_ADDR(cpu) \ + (MSI_MIPS_ADDR_BASE | (cpu) << 12 | \ + MSI_MIPS_ADDR_RH_OFF | MSI_MIPS_ADDR_DM_PHYSICAL) + +#define MIPS_MSI_DATA(irq) \ + (MSI_MIPS_DATA_TRGRLVL | MSI_MIPS_DATA_DELFIXED | \ + MSI_MIPS_DATA_ASSERT | (irq)) + +#define XLP_PCIE_BRIDGE_CMD_REG 0x1 +#define XLP_PCIE_BRIDGE_MSI_CAP_REG 0x14 +#define XLP_PCIE_BRIDGE_MSI_ADDRL_REG 0x15 +#define XLP_PCIE_BRIDGE_MSI_ADDRH_REG 0x16 +#define XLP_PCIE_BRIDGE_MSI_DATA_REG 0x17 + +/* XLP Global PCIE configuration space registers */ +#define XLP_PCIE_MSI_STATUS_REG 0x25A +#define XLP_PCIE_MSI_EN_REG 0x25B +#define XLP_PCIE_INT_EN0_REG 0x261 + +/* XLP_PCIE_MSI_EN_REG */ +#define PCIE_MSI_VECTOR_INT_EN 0xFFFFFFFF + +/* XLP_PCIE_INT_EN0_REG */ +#define PCIE_MSI_INT_EN (1 << 9) + +#endif /* __XLP_PCIBUS_H__ */ Added: user/jchandra/mips-xlp-support/sys/mips/nlm/hal/usb.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/hal/usb.h Mon Jul 25 16:45:47 2011 (r224333) @@ -0,0 +1,57 @@ +/*- + * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights + * reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * NETLOGIC_BSD */ + +#ifndef __NLM_USB_H__ +#define __NLM_USB_H__ + +#define XLP_USB_CTL0 0x41 +#define XLP_USB_PHY0 0x4A +#define USBPHYRESET 0x01 +#define USBPHYPORTRESET0 0x10 +#define USBPHYPORTRESET1 0x20 +#define USBCONTROLLERRESET 0x01 +#define XLP_USB_INT_STATUS 0x4E +#define XLP_USB_INT_EN 0x4F +#define USB_PHY_INTERRUPT_EN 0x01 +#define USB_OHCI_INTERRUPT_EN 0x02 +#define USB_OHCI_INTERRUPT1_EN 0x04 +#define USB_OHCI_INTERRUPT12_EN 0x08 +#define USB_CTRL_INTERRUPT_EN 0x10 + + +#if !defined(LOCORE) && !defined(__ASSEMBLY__) + +#define nlm_rdreg_usb(b, r) nlm_read_reg_kseg(b,r) +#define nlm_wreg_usb(b, r, v) nlm_write_reg_kseg(b,r,v) +#define nlm_pcibase_usb(node, inst) nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) +#define nlm_base_usb_pcibar(node, inst) nlm_pcibar0_base_xkphys(nlm_pcibase_usb(node, inst)) +#define nlm_regbase_usb(node, inst) (nlm_pcibase_usb(node, inst)) + +#endif +#endif Added: user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/intern_dev.c Mon Jul 25 16:45:47 2011 (r224333) @@ -0,0 +1,86 @@ +/*- + * Copyright (c) 2011 Netlogic Microsystems Inc. + * + * (based on pci/ignore_pci.c) + * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> + * Copyright (c) 2000 BSDi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +/* + * 'Ignore' driver - eats devices that show up errnoeously on PCI + * but shouldn't ever be listed or handled by a driver. + */ + +#include <sys/param.h> +#include <sys/types.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/bus.h> + +#include <dev/pci/pcivar.h> + +#include <mips/nlm/hal/mmio.h> +#include <mips/nlm/hal/iomap.h> + +static int nlm_soc_pci_probe(device_t dev); + +static device_method_t nlm_soc_pci_methods[] = { + DEVMETHOD(device_probe, nlm_soc_pci_probe), + DEVMETHOD(device_attach, bus_generic_attach), + { 0, 0 } +}; + +static driver_t nlm_soc_pci_driver = { + "nlm_soc_pci", + nlm_soc_pci_methods, + 0, +}; + +static devclass_t nlm_soc_pci_devclass; +DRIVER_MODULE(nlm_soc_pci, pci, nlm_soc_pci_driver, nlm_soc_pci_devclass, 0, 0); + +static int +nlm_soc_pci_probe(device_t dev) +{ + if (pci_get_vendor(dev) != PCI_VENDOR_NETLOGIC) + return(ENXIO); + + /* Ignore SoC internal devices */ + switch (pci_get_device(dev)) { + case PCI_DEVICE_ID_NLM_ICI: + case PCI_DEVICE_ID_NLM_PIC: + case PCI_DEVICE_ID_NLM_FMN: + device_set_desc(dev, "Netlogic Internal"); + device_quiet(dev); + return(-10000); + + default: + return(ENXIO); + } +} Copied: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c (from r224008, user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_mips_xlp.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_xlp.c Mon Jul 25 16:45:47 2011 (r224333, copy of r224008, user/jchandra/mips-xlp-support/sys/mips/nlm/uart_cpu_mips_xlp.c) @@ -0,0 +1,89 @@ +/*- + * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights + * reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * NETLOGIC_BSD */ + +/* + * Skeleton of this file was based on respective code for ARM + * code written by Olivier Houchard. + */ +/* + * XLRMIPS: This file is hacked from arm/... + */ +#include "opt_uart.h" + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD: head/sys/mips/rmi/uart_cpu_mips_xlr.c 202175 2010-01-12 21:36:08Z imp $"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/cons.h> +#include <sys/kdb.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mutex.h> + +#include <machine/bus.h> + +#include <dev/uart/uart.h> +#include <dev/uart/uart_cpu.h> + +#include <mips/nlm/hal/mmio.h> +#include <mips/nlm/hal/iomap.h> +#include <mips/nlm/hal/uart.h> + +bus_space_tag_t uart_bus_space_io; +bus_space_tag_t uart_bus_space_mem; + +int +uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) +{ + return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); +} + + +int +uart_cpu_getdev(int devtype, struct uart_devinfo *di) +{ + di->ops = uart_getops(&uart_ns8250_class); + di->bas.chan = 0; + di->bas.bst = rmi_bus_space; + di->bas.bsh = nlm_regbase_uart(0, 0) + XLP_IO_PCI_HDRSZ; + + di->bas.regshft = 2; + /* divisor = rclk / (baudrate * 16); */ + di->bas.rclk = 133000000; + di->baudrate = 115200; + di->databits = 8; + di->stopbits = 1; + di->parity = UART_PARITY_NONE; + + uart_bus_space_io = NULL; + uart_bus_space_mem = rmi_bus_space; + return (0); +} Added: user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/uart_pci_xlp.c Mon Jul 25 16:45:47 2011 (r224333) @@ -0,0 +1,86 @@ +/*- + * Copyright (c) 2011 Netlogic Microsystems Inc. + * + * (based on dev/uart/uart_bus_pci.c) + * Copyright (c) 2006 Marcel Moolenaar + * Copyright (c) 2001 M. Warner Losh + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <machine/bus.h> +#include <sys/rman.h> +#include <machine/resource.h> + +#include <dev/pci/pcivar.h> + +#include <mips/nlm/hal/mmio.h> +#include <mips/nlm/hal/iomap.h> +#include <mips/nlm/hal/uart.h> + +#include <dev/uart/uart.h> +#include <dev/uart/uart_bus.h> + +static int uart_soc_probe(device_t dev); + +static device_method_t uart_soc_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, uart_soc_probe), + DEVMETHOD(device_attach, uart_bus_attach), + DEVMETHOD(device_detach, uart_bus_detach), + { 0, 0 } +}; + +static driver_t uart_soc_driver = { + uart_driver_name, + uart_soc_methods, + sizeof(struct uart_softc), +}; + +static int +uart_soc_probe(device_t dev) +{ + struct uart_softc *sc; + uint64_t ubase; + + if (pci_get_vendor(dev) != PCI_VENDOR_NETLOGIC || + pci_get_device(dev) != PCI_DEVICE_ID_NLM_UART) + return (ENXIO); + + ubase = nlm_regbase_uart(0, 0); + nlm_pci_wreg(ubase, 0xf, 0x1ff); + sc = device_get_softc(dev); + sc->sc_class = &uart_ns8250_class; + device_set_desc(dev, "Netlogic SoC UART"); + return (uart_bus_probe(dev, 2, 133000000, 0, 0)); +} + +DRIVER_MODULE(soc_uart, pci, uart_soc_driver, uart_devclass, 0, 0); Added: user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/usb_init.c Mon Jul 25 16:45:47 2011 (r224333) @@ -0,0 +1,91 @@ +/*- + * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights + * reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * + * NETLOGIC_BSD */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD: head/sys/mips/rmi/fmn.c 213474 2010-10-06 08:09:39Z jchandra $"); +#include <sys/types.h> +#include <sys/systm.h> +#include <sys/param.h> +#include <sys/kernel.h> + +#include <mips/nlm/hal/mmio.h> +#include <mips/nlm/hal/iomap.h> +#include <mips/nlm/hal/usb.h> + +#include <mips/nlm/xlp.h> + + +static void +nlm_usb_intr_en(int node, int port) +{ + uint32_t val; + uint64_t port_addr; + + port_addr = nlm_regbase_usb(node, port); + val = nlm_rdreg_usb(port_addr, XLP_USB_INT_EN); + val = USB_CTRL_INTERRUPT_EN | USB_OHCI_INTERRUPT_EN | + USB_OHCI_INTERRUPT1_EN | USB_CTRL_INTERRUPT_EN | + USB_OHCI_INTERRUPT_EN | USB_OHCI_INTERRUPT12_EN; + nlm_wreg_usb(port_addr, XLP_USB_INT_EN, val); +} + +static void +nlm_usb_hw_reset(int node, int port) +{ + uint64_t port_addr; + uint32_t val; + + /* reset USB phy */ + port_addr = nlm_regbase_usb(node, port); + val = nlm_rdreg_usb(port_addr, XLP_USB_PHY0); + val &= ~(USBPHYRESET | USBPHYPORTRESET0 | USBPHYPORTRESET1); + nlm_wreg_usb(port_addr, XLP_USB_PHY0, val); + + DELAY(100); + val = nlm_rdreg_usb(port_addr, XLP_USB_CTL0); + val &= ~(USBCONTROLLERRESET); + val |= 0x4; + nlm_wreg_usb(port_addr, XLP_USB_CTL0, val); +} + +static void +nlm_usb_init(void) +{ + /* XXX: should be checking if these are in Device mode here */ + printf("Initialize USB Interface\n"); + nlm_usb_hw_reset(0, 0); + nlm_usb_hw_reset(0, 3); + + /* Enable PHY interrupts */ + nlm_usb_intr_en(0, 0); + nlm_usb_intr_en(0, 3); +} + +SYSINIT(nlm_usb_init, SI_SUB_CPU, SI_ORDER_MIDDLE, + nlm_usb_init, NULL); Added: user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_pci.c Mon Jul 25 16:45:47 2011 (r224333) @@ -0,0 +1,656 @@ +/*- + * Copyright (c) 2003-2009 RMI Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of RMI Corporation, nor the names of its contributors, + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * NETLOGIC_BSD */ +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/types.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/malloc.h> +#include <sys/bus.h> +#include <sys/endian.h> +#include <sys/rman.h> + +#include <vm/vm.h> +#include <vm/vm_param.h> +#include <vm/pmap.h> + +#include <sys/pciio.h> +#include <dev/pci/pcivar.h> +#include <dev/pci/pcireg.h> + +#include <machine/bus.h> +#include <machine/md_var.h> +#include <machine/intr_machdep.h> +#include <machine/cpuregs.h> + +#include <mips/nlm/hal/mmio.h> +#include <mips/nlm/interrupt.h> +#include <mips/nlm/hal/iomap.h> +#include <mips/nlm/hal/pic.h> +#include <mips/nlm/hal/cop0.h> +#include <mips/nlm/hal/pcibus.h> +#include <mips/nlm/hal/uart.h> +#include <mips/nlm/xlp.h> + +#include "pcib_if.h" + +struct xlp_pcib_softc { + bus_dma_tag_t sc_pci_dmat; /* PCI DMA tag pointer */ +}; + +static devclass_t pcib_devclass; +static struct rman irq_rman, port_rman, mem_rman, emul_rman; + +static void +xlp_pci_init_resources(void) +{ + + irq_rman.rm_start = 0; + irq_rman.rm_end = 255; + irq_rman.rm_type = RMAN_ARRAY; + irq_rman.rm_descr = "PCI Mapped Interrupts"; + if (rman_init(&irq_rman) + || rman_manage_region(&irq_rman, 0, 255)) + panic("pci_init_resources irq_rman"); + + port_rman.rm_start = 0; + port_rman.rm_end = ~0u; + port_rman.rm_type = RMAN_ARRAY; + port_rman.rm_descr = "I/O ports"; + if (rman_init(&port_rman) + || rman_manage_region(&port_rman, 0x14000000UL, 0x15ffffffUL)) + panic("pci_init_resources port_rman"); + + mem_rman.rm_start = 0; + mem_rman.rm_end = ~0u; + mem_rman.rm_type = RMAN_ARRAY; + mem_rman.rm_descr = "I/O memory"; + if (rman_init(&mem_rman) + || rman_manage_region(&mem_rman, 0xd0000000ULL, 0xdfffffffULL)) + panic("pci_init_resources mem_rman"); + + emul_rman.rm_start = 0; + emul_rman.rm_end = ~0u; + emul_rman.rm_type = RMAN_ARRAY; + emul_rman.rm_descr = "Emulated MEMIO"; + if (rman_init(&emul_rman) + || rman_manage_region(&emul_rman, 0x18000000ULL, 0x18ffffffULL)) + panic("pci_init_resources emul_rman"); + +} + +static int +xlp_pcib_probe(device_t dev) +{ + + device_set_desc(dev, "XLP PCI bus"); + + xlp_pci_init_resources(); + return (0); +} + +static int +xlp_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) +{ + + switch (which) { + case PCIB_IVAR_DOMAIN: + *result = 0; + return (0); + case PCIB_IVAR_BUS: + *result = 0; + return (0); + } + return (ENOENT); +} + +static int +xlp_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t result) +{ + switch (which) { + case PCIB_IVAR_DOMAIN: + return (EINVAL); + case PCIB_IVAR_BUS: + return (EINVAL); + } + return (ENOENT); +} + +static int +xlp_pcib_maxslots(device_t dev) +{ + + return (PCI_SLOTMAX); +} + +static u_int32_t +xlp_pcib_read_config(device_t dev, u_int b, u_int s, u_int f, + u_int reg, int width) +{ + uint32_t data = 0; + uint64_t cfgaddr; + int regindex = reg/sizeof(uint32_t); + + cfgaddr = nlm_pcicfg_base(XLP_HDR_OFFSET(0, b, s, f)); + if ((width == 2) && (reg & 1)) + return 0xFFFFFFFF; + else if ((width == 4) && (reg & 3)) + return 0xFFFFFFFF; + + data = nlm_pci_rdreg(cfgaddr, regindex); + + /* + * Fix up read data in some SoC devices + * to emulate complete PCIe header + */ + if (b == 0) { + int dev = s % 8; + + /* Fake intpin on config read for UART/I2C, USB, SD/Flash */ + if (regindex == 0xf && + (dev == 6 || dev == 2 || dev == 7)) + data |= 0x1 << 8; /* Fake int pin */ + } + + if (width == 1) + return ((data >> ((reg & 3) << 3)) & 0xff); + else if (width == 2) + return ((data >> ((reg & 3) << 3)) & 0xffff); + else + return (data); +} + +static void +xlp_pcib_write_config(device_t dev, u_int b, u_int s, u_int f, + u_int reg, u_int32_t val, int width) +{ + uint64_t cfgaddr; + uint32_t data = 0; + int regindex = reg / sizeof(uint32_t); + + cfgaddr = nlm_pcicfg_base(XLP_HDR_OFFSET(0, b, s, f)); + if ((width == 2) && (reg & 1)) + return; + else if ((width == 4) && (reg & 3)) + return; + + if (width == 1) { + data = nlm_pci_rdreg(cfgaddr, regindex); + data = (data & ~(0xff << ((reg & 3) << 3))) | + (val << ((reg & 3) << 3)); + } else if (width == 2) { + data = nlm_pci_rdreg(cfgaddr, regindex); + data = (data & ~(0xffff << ((reg & 3) << 3))) | + (val << ((reg & 3) << 3)); + } else { + data = val; + } + + nlm_pci_wreg(cfgaddr, regindex, data); + + return; +} + +static int +xlp_pcib_attach(device_t dev) +{ + struct xlp_pcib_softc *sc; + sc = device_get_softc(dev); + + device_add_child(dev, "pci", 0); + bus_generic_attach(dev); + + return (0); +} + +static void +xlp_pcib_identify(driver_t * driver, device_t parent) +{ + + BUS_ADD_CHILD(parent, 0, "pcib", 0); +} + +/* + * XLS PCIe can have upto 4 links, and each link has its on IRQ + * Find the link on which the device is on + */ +static int +xlp_pcie_link(device_t pcib, device_t dev) +{ + device_t parent, tmp; + + /* find the lane on which the slot is connected to */ + printf("xlp_pcie_link : bus %s dev %s\n", device_get_nameunit(pcib), + device_get_nameunit(dev)); + tmp = dev; + while (1) { + parent = device_get_parent(tmp); + if (parent == NULL || parent == pcib) { + device_printf(dev, "Cannot find parent bus\n"); + return (-1); + } + if (strcmp(device_get_nameunit(parent), "pci0") == 0) + break; + tmp = parent; + } + return (pci_get_function(tmp)); +} + +/* + * Find the IRQ for the link, each link has a different interrupt + * at the XLP pic + */ +static int +xlp_pcie_link_irt(int link) +{ + + if( (link < 0) || (link > 3)) + return (-1); + + return XLP_PIC_IRT_PCIE_LINK_INDEX(link); +} + +static int +xlp_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) +{ + int i, link; + + /* + * Each link has 32 MSIs that can be allocated, but for now + * we only support one device per link. + * msi_alloc() equivalent is needed when we start supporting + * bridges on the PCIe link. + */ + link = xlp_pcie_link(pcib, dev); + if (link == -1) + return (ENXIO); + + /* + * encode the irq so that we know it is a MSI interrupt when we + * setup interrupts + */ + for (i = 0; i < count; i++) + irqs[i] = 64 + link * 32 + i; + + return (0); +} + +static int +xlp_release_msi(device_t pcib, device_t dev, int count, int *irqs) +{ + device_printf(dev, "%s: msi release %d\n", device_get_nameunit(pcib), + count); + return (0); +} + +static int +xlp_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, + uint32_t *data) +{ + int msi, irt; + + if (irq >= 64) { + msi = irq - 64; + *addr = MIPS_MSI_ADDR(0); + + irt = xlp_pcie_link_irt(msi/32); + if (irt != -1) + *data = MIPS_MSI_DATA(xlp_irt_to_irq(irt)); + return (0); + } else { + device_printf(dev, "%s: map_msi for irq %d - ignored", + device_get_nameunit(pcib), irq); + return (ENXIO); + } +} + +static void +bridge_pcie_ack(int irq) +{ + uint32_t node,reg; + uint64_t base; + + node = nlm_nodeid(); + reg = XLP_PCIE_MSI_STATUS_REG; + + switch(irq) { + case XLP_PIC_IRT_PCIE0_IRQ: + base = nlm_pcicfg_base(XLP_IO_PCIE0_OFFSET(node)); + break; + case XLP_PIC_IRT_PCIE1_IRQ: + base = nlm_pcicfg_base(XLP_IO_PCIE1_OFFSET(node)); + break; + case XLP_PIC_IRT_PCIE2_IRQ: + base = nlm_pcicfg_base(XLP_IO_PCIE2_OFFSET(node)); + break; + case XLP_PIC_IRT_PCIE3_IRQ: + base = nlm_pcicfg_base(XLP_IO_PCIE3_OFFSET(node)); + break; + default: + return; + } + + nlm_pci_wreg(base, reg, 0xFFFFFFFF); + + return; +} + +static int +mips_platform_pci_setup_intr(device_t dev, device_t child, + struct resource *irq, int flags, driver_filter_t *filt, *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201107251645.p6PGjmOb065567>