From nobody Mon May 12 12:50:30 2025 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4Zwzwk3v4Sz5w0fB; Mon, 12 May 2025 12:50:30 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Zwzwk1fn7z3rjg; Mon, 12 May 2025 12:50:30 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1747054230; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=CkPdxYQRAFTfd833l+kq38ZOM56Qu0QCY5mivDpdo2A=; b=oWmwTLhjsSnDamxQJVXYn7sLi60+OjOcQs0lawvs57DRXxq6uT405jzkQ6jWdWp5A8dtIR nSCIEqw/lUnHLnVNMAGsZ5D072OtwAobDm5sIWoEq7O0CcjBYQ7zWgBP8nEpv3WBYltzNW apZeCdSjIIJ4vzq1Gf+tlQ39TlnoIABOptp23pmnT8VUDeKO7Z/a9C7IL2mTu3tSaX8sQs glJ0Mhfj0ENj6ddhKMiW/UYczljrWvfbkwrXUOtG+pOhpuGAFCdPw0Zta779uS8/I9+9DT /dNy61fk+kGEEdj4McCToE0Gw8XfyXMY9gvXmMds3e/eh6CQIlE6YZNhdEaEKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1747054230; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=CkPdxYQRAFTfd833l+kq38ZOM56Qu0QCY5mivDpdo2A=; b=Fw2+FnYHLYAbXaI54tqrgx25RLBBj/P1eyBohCEZUOiGZYrLf/sIwYL4OXt/VbpjraIjgC rBjZjljVYlCwyLhUGg214l1LGymKZTpI4M+QryVbIgCvCQy7j1dx4TuCixEH8iNy5vynRO +z67QVYS7rF9HTbR6aD2qb/XdAhMzC060GvX1N7Y+R88wgi8c4mWw/p4dyxsfM3MEuis2q +op53MmspfMLbdg87pXQRrs/whgIQoQHH6rzqv8D2mqIvuMd0UDwXjqSI5dERfClg/ZAVF e/oVwJHA0Z/OjwjgDv2ICFHQlS8D6yizWJGj+Kqg99akoalplw9cYd4Rg3tGlg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1747054230; a=rsa-sha256; cv=none; b=Thn+0ZZcA3rePjkQvN2RtgSTrgnEhLUQ5cEO4OUtKes+3AWSgMbmrk22kiekCJHfmlrVuX SU9PZMhqMBubbkoJZ4Df/4E8yWdhkhol7E1FPYgzJxlsZZBl4NCMCApuysfP+bPnPMK2pz 5Sn0gN9/PskmZ8a/CfIz0KQ02kw3Xr2FtcbhETJLRW1iZvwZ/ETmW3e2K5StvXI/QniDpM v2mXrj7oJTikAOj0Hk8Uf0rIfXRH5yvefp5R4sP8oXu/8k/JV5wYRzu8/twD8psc5CoCxj bZCB93zRM9a9TXCfToBkACrubrUBJ6pZdW1hVFmEOmZ4yvg+JinzNJvjW7qEIA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4Zwzwk18fZz1Fyx; Mon, 12 May 2025 12:50:30 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 54CCoU4a083140; Mon, 12 May 2025 12:50:30 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 54CCoUWI083137; Mon, 12 May 2025 12:50:30 GMT (envelope-from git) Date: Mon, 12 May 2025 12:50:30 GMT Message-Id: <202505121250.54CCoUWI083137@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 4bc53dc71c57 - main - arm64: Use a sys handler for CTR_EL0 List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 4bc53dc71c57c1e0dfb9ae48d7f63ab218aa50f3 Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=4bc53dc71c57c1e0dfb9ae48d7f63ab218aa50f3 commit 4bc53dc71c57c1e0dfb9ae48d7f63ab218aa50f3 Author: Andrew Turner AuthorDate: 2025-05-12 11:08:06 +0000 Commit: Andrew Turner CommitDate: 2025-05-12 11:08:06 +0000 arm64: Use a sys handler for CTR_EL0 When we trap CTR_EL0 we use the undefined instruction handler. As this is accessed with a mrs instruction use the new infrastructure to use that to handle it. Reviewed by: harry.moulton_arm.com Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D50213 --- sys/arm64/arm64/identcpu.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index ee40a33c1da2..16af88dd3c97 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -2341,21 +2341,22 @@ static struct cpu_feat user_ctr = { }; DATA_SET(cpu_feat_set, user_ctr); -static int -user_ctr_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame, - uint32_t esr) +static bool +user_ctr_handler(uint64_t esr, struct trapframe *frame) { uint64_t value; int reg; - if ((insn & MRS_MASK) != MRS_VALUE) - return (0); + if (ESR_ELx_EXCEPTION(esr) != EXCP_MSR) + return (false); + + /* Only support reading from ctr_el0 */ + if ((esr & ISS_MSR_DIR) == 0) + return (false); /* Check if this is the ctr_el0 register */ - /* TODO: Add macros to armreg.h */ - if (mrs_Op0(insn) != 3 || mrs_Op1(insn) != 3 || mrs_CRn(insn) != 0 || - mrs_CRm(insn) != 0 || mrs_Op2(insn) != 1) - return (0); + if ((esr & ISS_MSR_REG_MASK) != CTR_EL0_ISS) + return (false); if (SV_CURPROC_ABI() == SV_ABI_FREEBSD) value = user_cpu_desc.ctr; @@ -2367,17 +2368,17 @@ user_ctr_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame, */ frame->tf_elr += INSN_SIZE; - reg = MRS_REGISTER(insn); + reg = ISS_MSR_Rt(esr); /* If reg is 31 then write to xzr, i.e. do nothing */ if (reg == 31) - return (1); + return (true); if (reg < nitems(frame->tf_x)) frame->tf_x[reg] = value; else if (reg == 30) frame->tf_lr = value; - return (1); + return (true); } static bool @@ -2793,7 +2794,7 @@ identify_cpu_sysinit(void *dummy __unused) panic("CPU does not support LSE atomic instructions"); #endif - install_undef_handler(user_ctr_handler); + install_sys_handler(user_ctr_handler); install_sys_handler(user_idreg_handler); } SYSINIT(identify_cpu, SI_SUB_CPU, SI_ORDER_MIDDLE, identify_cpu_sysinit, NULL);