Date: Tue, 24 Feb 2009 19:56:30 +1030 From: "Daniel O'Connor" <doconnor@gsoft.com.au> To: freebsd-stable@freebsd.org Subject: E7400 Speedstep support? Message-ID: <200902241956.46306.doconnor@gsoft.com.au>
next in thread | raw e-mail | index | archive | help
--nextPart2080303.D1j3bpGAEV Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hi, I recently got a new Intel E7400 based system and dmesg reports.. est0: <Enhanced SpeedStep Frequency Control> on cpu0 est0: Guessed bus clock (high) of 37 MHz est0: Guessed bus clock (low) of 466 MHz est: CPU supports Enhanced Speedstep, but is not recognized. est: cpu_vendor GenuineIntel, msr 6164a2206004a22 device_attach: est0 attach returned 6 p4tcc0: <CPU Frequency Thermal Control> on cpu0 cpu1: <ACPI CPU> on acpi0 est1: <Enhanced SpeedStep Frequency Control> on cpu1 est1: Guessed bus clock (high) of 37 MHz est1: Guessed bus clock (low) of 466 MHz est: CPU supports Enhanced Speedstep, but is not recognized. est: cpu_vendor GenuineIntel, msr 6164a2206004a22 device_attach: est1 attach returned 6 p4tcc1: <CPU Frequency Thermal Control> on cpu1 I'm running 7.1-STABLE and I was wondering how hard it is to add support fo= r=20 est for this CPU? Thanks. =2D-=20 Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8C --nextPart2080303.D1j3bpGAEV Content-Type: application/pgp-signature; name=signature.asc Content-Description: This is a digitally signed message part. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (GNU/Linux) iD8DBQBJo71H5ZPcIHs/zowRAtceAJ0fuY8GP76q7Ohxj4fDy34HyftONgCgme14 xpjKemIJZI/qDXnvcyEXy9c= =J1l1 -----END PGP SIGNATURE----- --nextPart2080303.D1j3bpGAEV--
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200902241956.46306.doconnor>