From owner-svn-src-head@freebsd.org Sat Feb 1 19:46:03 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id AFDF922997E; Sat, 1 Feb 2020 19:46:03 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4894Mb4C8Cz3y3r; Sat, 1 Feb 2020 19:46:03 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 722354117; Sat, 1 Feb 2020 19:46:03 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 011Jk36g021468; Sat, 1 Feb 2020 19:46:03 GMT (envelope-from cem@FreeBSD.org) Received: (from cem@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 011Jk2lB021466; Sat, 1 Feb 2020 19:46:02 GMT (envelope-from cem@FreeBSD.org) Message-Id: <202002011946.011Jk2lB021466@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: cem set sender to cem@FreeBSD.org using -f From: Conrad Meyer Date: Sat, 1 Feb 2020 19:46:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r357377 - in head/sys/x86: cpufreq include x86 X-SVN-Group: head X-SVN-Commit-Author: cem X-SVN-Commit-Paths: in head/sys/x86: cpufreq include x86 X-SVN-Commit-Revision: 357377 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 01 Feb 2020 19:46:03 -0000 Author: cem Date: Sat Feb 1 19:46:02 2020 New Revision: 357377 URL: https://svnweb.freebsd.org/changeset/base/357377 Log: x86: Add/amend some power-management comments/macros No functional change. Modified: head/sys/x86/cpufreq/hwpstate_intel.c head/sys/x86/include/specialreg.h head/sys/x86/x86/identcpu.c Modified: head/sys/x86/cpufreq/hwpstate_intel.c ============================================================================== --- head/sys/x86/cpufreq/hwpstate_intel.c Sat Feb 1 19:45:27 2020 (r357376) +++ head/sys/x86/cpufreq/hwpstate_intel.c Sat Feb 1 19:46:02 2020 (r357377) @@ -329,6 +329,14 @@ set_autonomous_hwp(struct hwp_softc *sc) /* XXX: Many MSRs aren't readable until feature is enabled */ ret = wrmsr_safe(MSR_IA32_PM_ENABLE, 1); if (ret) { + /* + * This is actually a package-level MSR, and only the first + * write is not ignored. So it is harmless to enable it across + * all devices, and this allows us not to care especially in + * which order cores (and packages) are probed. This error + * condition should not happen given we gate on the HWP CPUID + * feature flag, if the Intel SDM is correct. + */ device_printf(dev, "Failed to enable HWP for cpu%d (%d)\n", pc->pc_cpuid, ret); goto out; @@ -350,6 +358,10 @@ set_autonomous_hwp(struct hwp_softc *sc) goto out; } + /* + * High and low are static; "guaranteed" is dynamic; and efficient is + * also dynamic. + */ sc->high = IA32_HWP_CAPABILITIES_HIGHEST_PERFORMANCE(caps); sc->guaranteed = IA32_HWP_CAPABILITIES_GUARANTEED_PERFORMANCE(caps); sc->efficient = IA32_HWP_CAPABILITIES_EFFICIENT_PERFORMANCE(caps); Modified: head/sys/x86/include/specialreg.h ============================================================================== --- head/sys/x86/include/specialreg.h Sat Feb 1 19:45:27 2020 (r357376) +++ head/sys/x86/include/specialreg.h Sat Feb 1 19:46:02 2020 (r357377) @@ -566,6 +566,7 @@ #define MSR_IA32_TEMPERATURE_TARGET 0x1a2 #define MSR_TURBO_RATIO_LIMIT 0x1ad #define MSR_TURBO_RATIO_LIMIT1 0x1ae +#define MSR_IA32_ENERGY_PERF_BIAS 0x1b0 #define MSR_DEBUGCTLMSR 0x1d9 #define MSR_LASTBRANCHFROMIP 0x1db #define MSR_LASTBRANCHTOIP 0x1dc Modified: head/sys/x86/x86/identcpu.c ============================================================================== --- head/sys/x86/x86/identcpu.c Sat Feb 1 19:45:27 2020 (r357376) +++ head/sys/x86/x86/identcpu.c Sat Feb 1 19:46:02 2020 (r357377) @@ -119,9 +119,9 @@ u_int cpu_mon_min_size; /* MONITOR minimum range size, u_int cpu_mon_max_size; /* MONITOR minimum range size, bytes */ u_int cpu_maxphyaddr; /* Max phys addr width in bits */ u_int cpu_power_eax; /* 06H: Power management leaf, %eax */ -u_int cpu_power_ebx; /* 06H: Power management leaf, %eax */ -u_int cpu_power_ecx; /* 06H: Power management leaf, %eax */ -u_int cpu_power_edx; /* 06H: Power management leaf, %eax */ +u_int cpu_power_ebx; /* 06H: Power management leaf, %ebx */ +u_int cpu_power_ecx; /* 06H: Power management leaf, %ecx */ +u_int cpu_power_edx; /* 06H: Power management leaf, %edx */ char machine[] = MACHINE; SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD,