Date: Fri, 2 Feb 1996 12:54:01 -0600 (CST) From: Joe Greco <jgreco@brasil.moneng.mei.com> To: msmith@atrad.adelaide.edu.au (Michael Smith) Cc: hackers@freebsd.org Subject: Re: Watchdog timers (was: Re: Multi-Port Async Cards) Message-ID: <199602021854.MAA11875@brasil.moneng.mei.com> In-Reply-To: <199602020143.MAA25721@genesis.atrad.adelaide.edu.au> from "Michael Smith" at Feb 2, 96 12:13:55 pm
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> If you're going to decode the I/O's already, don't bother with the UART. > I have a rough schematic for this already, and I'll work on it when I can; > keep the ideas coming 8) Your intent is to emulate the UART? I'm sorry, I'm not THAT good at digital logic design :-) I wouldn't know where to start. ... Joe ------------------------------------------------------------------------------- Joe Greco - Systems Administrator jgreco@ns.sol.net Solaria Public Access UNIX - Milwaukee, WI 414/546-7968
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