From owner-svn-src-head@freebsd.org Fri Jul 29 18:13:09 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 25AFDBA7639; Fri, 29 Jul 2016 18:13:09 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 060F217FE; Fri, 29 Jul 2016 18:13:09 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from ralph.baldwin.cx (c-73-231-226-104.hsd1.ca.comcast.net [73.231.226.104]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 13A19B945; Fri, 29 Jul 2016 14:13:07 -0400 (EDT) From: John Baldwin To: Ngie Cooper Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: Re: svn commit: r303497 - head/sys/dev/pci Date: Fri, 29 Jul 2016 11:11:27 -0700 Message-ID: <2350179.pmqWqTZJad@ralph.baldwin.cx> User-Agent: KMail/4.14.3 (FreeBSD/10.3-STABLE; KDE/4.14.3; amd64; ; ) In-Reply-To: References: <201607291754.u6THsLl5098040@repo.freebsd.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Fri, 29 Jul 2016 14:13:07 -0400 (EDT) X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jul 2016 18:13:09 -0000 On Friday, July 29, 2016 11:04:01 AM Ngie Cooper wrote: > > > On Jul 29, 2016, at 10:54, John Baldwin wrote: > > > > Author: jhb > > Date: Fri Jul 29 17:54:21 2016 > > New Revision: 303497 > > URL: https://svnweb.freebsd.org/changeset/base/303497 > > > > Log: > > Add a loader tunable (hw.pci.enable_pcie_hp) to disable PCI-e HotPlug. > > > > Some systems and/or devices (such as riser cards) do not include a > > non-compliant implementation of PCI-e HotPlug that can result in devices > > not being attached (e.g. the HotPlug code might assume that a card is > > being unplugged and will power the slot off and detach it). This > > tunable can be set to 0 to disable support for PCI-e HotPlug ignoring > > the incorrect HotPlug state on these slots. > > > > PR: 211081 > > Reported by: Sergey Renkas (SuperMicro X7 riser card) > > Reported by: Jeffrey E Pieper > > (Intel X520 adapter) > > MFC after: 1 week > > Relnotes: yes > > Should this be done on a per-bus basis? For now this is just a way to disable it globally. If need be we could add a separate hint to do it per-bridge (hint.pcib.X.hp=0/1 or some such). I'm still working with the Intel folks to see if I can narrow down exactly what makes this chip unhappy to see if I can include a workaround. Both of these devices use a chip from PLX to manage an internal PCI bridge. In both cases the PLX chip reports that a mechnical latch is open (PCI HP supports an optional latch that can be opened to release a card so it can be removed), but neither device has a real latch (so the sensor has not been wired correctly in either device). However, just bypassing the sensor check isn't sufficient to allow the devices behind the bridge to probe. -- John Baldwin