Date: Sat, 19 Nov 2011 14:14:35 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r227724 - head/sys/mips/mips Message-ID: <201111191414.pAJEEZGR046743@svn.freebsd.org>
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Author: jchandra Date: Sat Nov 19 14:14:35 2011 New Revision: 227724 URL: http://svn.freebsd.org/changeset/base/227724 Log: Fixup cache flush definitions for XLP mco_icache_sync_range was earlier set to mipsNN_icache_sync_range_index_32 which is not necessary, revert this. Also, the data cache is coherent so write back is not really needed. This change is experimental. Modified: head/sys/mips/mips/cache.c Modified: head/sys/mips/mips/cache.c ============================================================================== --- head/sys/mips/mips/cache.c Sat Nov 19 14:10:16 2011 (r227723) +++ head/sys/mips/mips/cache.c Sat Nov 19 14:14:35 2011 (r227724) @@ -101,13 +101,8 @@ mips_config_cache(struct mips_cpuinfo * break; case 32: mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_32; -#ifdef CPU_NLM - mips_cache_ops.mco_icache_sync_range = - mipsNN_icache_sync_range_index_32; -#else mips_cache_ops.mco_icache_sync_range = mipsNN_icache_sync_range_32; -#endif mips_cache_ops.mco_icache_sync_range_index = mipsNN_icache_sync_range_index_32; break; @@ -155,18 +150,23 @@ mips_config_cache(struct mips_cpuinfo * mips_cache_ops.mco_pdcache_wbinv_all = mips_cache_ops.mco_intern_pdcache_wbinv_all = mipsNN_pdcache_wbinv_all_32; -#ifdef CPU_NLM - mips_cache_ops.mco_pdcache_wbinv_range = - mipsNN_pdcache_wbinv_range_index_32; +#if defined(CPU_RMI) || defined(CPU_NLM) + mips_cache_ops.mco_pdcache_wbinv_range = cache_noop; #else mips_cache_ops.mco_pdcache_wbinv_range = mipsNN_pdcache_wbinv_range_32; #endif +#if defined(CPU_RMI) || defined(CPU_NLM) + mips_cache_ops.mco_pdcache_wbinv_range_index = + mips_cache_ops.mco_intern_pdcache_wbinv_range_index = cache_noop; + mips_cache_ops.mco_pdcache_inv_range = cache_noop; +#else mips_cache_ops.mco_pdcache_wbinv_range_index = mips_cache_ops.mco_intern_pdcache_wbinv_range_index = mipsNN_pdcache_wbinv_range_index_32; mips_cache_ops.mco_pdcache_inv_range = mipsNN_pdcache_inv_range_32; +#endif #if defined(CPU_RMI) || defined(CPU_NLM) mips_cache_ops.mco_pdcache_wb_range = mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop;
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