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Date: Wed, 16 Jun 2004 09:35:40 -0700 (PDT)
From: John Polstra <jdp@polstra.com>
To: Radek Kozlowski <radek@raadradd.com>
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cc: Alexander Leidinger <Alexander@Leidinger.net>
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Subject: Re: How to determine the L2 cache size on non-AMD CPUs (automatic
	page queue color tuning)?
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On 16-Jun-2004 Radek Kozlowski wrote:
> On 2004.06.16 18:11, John Polstra wrote:
>> 
>> Check out the "misc/cpuid" port.  Here's some sample output from a
>> PIII system.  Cache information is at the end.
>> 
> 
> The latest version of cpuid is from 2002 and at least for my Athlon XP-M 
> processor it doesn't read the information about L2 cache correctly. 
> IIRC, for my L2 size it only takes one byte from the beginning of ecx 
> register, whereas in my case it is stored in two, a.s.o. So I wouldn't 
> rely on cpuid when it comes to newer CPUs.

Yes, but it gives working code that generally shows how to get the
information.  Here's a link to an Intel document "Intel(R) Processor
Idientification and the CPUID Instruction" that covers the newer CPUs:

  http://www.intel.com/design/Xeon/applnots/24161825.pdf

John