From owner-svn-src-all@freebsd.org Wed Oct 5 04:40:50 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0DDB2AF6172; Wed, 5 Oct 2016 04:40:50 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D492BFB7; Wed, 5 Oct 2016 04:40:49 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u954enf9028711; Wed, 5 Oct 2016 04:40:49 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u954enFt028710; Wed, 5 Oct 2016 04:40:49 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201610050440.u954enFt028710@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Wed, 5 Oct 2016 04:40:49 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r306702 - head/sys/powerpc/mpc85xx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Oct 2016 04:40:50 -0000 Author: jhibbits Date: Wed Oct 5 04:40:48 2016 New Revision: 306702 URL: https://svnweb.freebsd.org/changeset/base/306702 Log: Fix e500mc/derivatives cpu idle Setting the doze registers wasn't actually working, and was being masked by a bad #ifdef. Since the #ifdef was fixed, now e500mc-based SoCs hang at idle. Fix this by using the intended wait. MFC after: 1 week Modified: head/sys/powerpc/mpc85xx/platform_mpc85xx.c Modified: head/sys/powerpc/mpc85xx/platform_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/platform_mpc85xx.c Wed Oct 5 01:01:10 2016 (r306701) +++ head/sys/powerpc/mpc85xx/platform_mpc85xx.c Wed Oct 5 04:40:48 2016 (r306702) @@ -530,9 +530,11 @@ mpc85xx_idle(platform_t plat, int cpu) uint32_t reg; if (mpc85xx_is_qoriq()) { - reg = ccsr_read4(OCP85XX_RCPM_CDOZCR); - ccsr_write4(OCP85XX_RCPM_CDOZCR, reg | (1 << cpu)); - ccsr_read4(OCP85XX_RCPM_CDOZCR); + /* + * Base binutils doesn't know what the 'wait' instruction is, so + * use the opcode encoding here. + */ + __asm __volatile("wrteei 1; .long 0x7c00007c"); } else { reg = mfmsr(); /* Freescale E500 core RM section 6.4.1. */ @@ -544,15 +546,6 @@ mpc85xx_idle(platform_t plat, int cpu) static int mpc85xx_idle_wakeup(platform_t plat, int cpu) { - uint32_t reg; - - if (mpc85xx_is_qoriq()) { - reg = ccsr_read4(OCP85XX_RCPM_CDOZCR); - ccsr_write4(OCP85XX_RCPM_CDOZCR, reg & ~(1 << cpu)); - ccsr_read4(OCP85XX_RCPM_CDOZCR); - - return (1); - } return (0); }