From nobody Tue Jun 23 16:37:05 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4gl9hL4mcSz6hj0P for ; Tue, 23 Jun 2026 16:37:06 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR1" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4gl9hL0xtqz3bQM for ; Tue, 23 Jun 2026 16:37:06 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1782232626; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/pK1hYPkG5VLyrZ/foZ4vUKaa4Ruk0ee/zLulFmH6U8=; b=Wj7KpBZw5I0EDj2cdOL1CxP87cWuKtl0x0W7A1DyGiZOXV3bwsbID6naj7KchKMhlIXdM6 40q4XnuZMGd3HCtLqhJCLJSnw6/wflPvWJq/oX/K3a989VuHmf8aLw66REPwJUABVvxet5 jz1d7S3uWcLYd7FX4uX9BmrQO8gMFyc0qMnHYdrIUqixF5qJjnRz0lViJGOxteau4BdjbK +mEjmrk5UN4nQ5WjxJ2okPcFfpT7Ae3NH8e/+O35gCS1lJKIaIJLmpJvgUGmgywpRZs6ae e3SmD2H3mlplIMmxed+BCl8GjiphN8AXjaN9qzzdW9cYyuketSmgwMaI9ACm5w== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1782232626; a=rsa-sha256; cv=none; b=Z+HMPbORM02OEIHZe3RZPeG2jGCjUxHmDmK2jt3vn1bOMa54m40n2shpoJRi1+rdvYtOX8 t4I6D9FfEXh03qbGfYKV9YwARNp/k/017mkScNx+fkCkbiCNs70hh9FgyayPRgNTALwn2t kyuSGqZ7nvjGBdL21d3dFgZSpyNesr51brY/elE57Tz67wTLw+KtyTsXhVgPgKUKfeL6RM CIAG9fVC1mOtBzkVIGHwYwjsRKL7R3KhjPQuev4jzMNVGNtrGlsQwrvVhkim2u86it7J0a zNzW35S4SHEFj4+QfDqPxsnUIC2H39evXMsH+Uu9RirRpT+Rwcb6GYSpOAQhCQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1782232626; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/pK1hYPkG5VLyrZ/foZ4vUKaa4Ruk0ee/zLulFmH6U8=; b=WPCPYDaOruiFmxbaaeyKhgALQyJgzlFXM9Vf4Bcqz7XzdkN6K3fQsFgnwniqWv+LaQAOrA AValxHBUu8R/SFGafEsKvHkRP9/rbBbeb6r1pSzpxRR396hUOwsP1bqmwneEjbgF8XjZkL HsN0B0ADuitI80ruDtO7n0s2P1H66foVpfGpwjE3yvhFcizxrNag5konCidYWQWIWmkYtT /2eRrNAREOSxZ8mM48bhwwDqSnumSaLS42dr6ImPF9Qv+tgsyaUuDWPtJTxenpYbYjCTXt oaq36VG3Sk9Tdb7Zu/nJU58DpPNE5Q3+P4ryMR48jmSsTw/ArTk7uIQi+8swaw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4gl9hK6v6bzjC7 for ; Tue, 23 Jun 2026 16:37:05 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 30299 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Tue, 23 Jun 2026 16:37:05 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Ali Mashtizadeh From: Mitchell Horne Subject: git: ed4f5e590ee6 - main - hwpmc_ibs: Add more IBS register definitions List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: ed4f5e590ee643d784af12541df3f13768937485 Auto-Submitted: auto-generated Date: Tue, 23 Jun 2026 16:37:05 +0000 Message-Id: <6a3ab631.30299.423ba17f@gitrepo.freebsd.org> The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=ed4f5e590ee643d784af12541df3f13768937485 commit ed4f5e590ee643d784af12541df3f13768937485 Author: Ali Mashtizadeh AuthorDate: 2026-06-22 16:30:15 +0000 Commit: Mitchell Horne CommitDate: 2026-06-23 16:36:47 +0000 hwpmc_ibs: Add more IBS register definitions Small change to add additional IBS register definitions for the new pmc tools. Most of the definitions are for Zen 4 and above where we get detailed information regarding the source of a completed memory operation. Reviewed by: mhorne Sponsored by: Netflix Pull Request: https://github.com/freebsd/freebsd-src/pull/2292 --- sys/dev/hwpmc/hwpmc_ibs.h | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/sys/dev/hwpmc/hwpmc_ibs.h b/sys/dev/hwpmc/hwpmc_ibs.h index d1474b7cba32..98abf9f17345 100644 --- a/sys/dev/hwpmc/hwpmc_ibs.h +++ b/sys/dev/hwpmc/hwpmc_ibs.h @@ -93,9 +93,11 @@ #define IBS_FETCH_CTL_L3MISS (1ULL << 61) /* L3 Cache Miss */ #define IBS_FETCH_CTL_OPCACHEMISS (1ULL << 60) /* Op Cache Miss */ #define IBS_FETCH_CTL_L3MISSONLY (1ULL << 59) /* L3 Miss Filtering */ +#define IBS_FETCH_CTL_L2MISS (1ULL << 58) #define IBS_FETCH_CTL_RANDOMIZE (1ULL << 57) /* Randomized Tagging */ +#define IBS_FETCH_CTL_L2TLBMISS (1ULL << 56) #define IBS_FETCH_CTL_L1TLBMISS (1ULL << 55) /* L1 TLB Miss */ -// Page size 54:53 +#define IBS_FETCH_CTL_TO_PGSZ(_d) (((_d) >> 53) & 0x3) #define IBS_FETCH_CTL_PHYSADDRVALID (1ULL << 52) /* PHYSADDR Valid */ #define IBS_FETCH_CTL_ICMISS (1ULL << 51) /* Inst. Cache Miss */ #define IBS_FETCH_CTL_COMPLETE (1ULL << 50) /* Complete */ @@ -171,11 +173,35 @@ #define IBS_OP_DATA_BRANCHMISPREDICTED (1ULL << 36) /* Branch Mispredicted */ #define IBS_OP_DATA_BRANCHTAKEN (1ULL << 35) /* Branch Taken */ #define IBS_OP_DATA_RETURN (1ULL << 34) /* Return */ +#define IBS_OP_DATA_TO_TAGTORET(_d) (((_d) >> 16) & 0xffff) +#define IBS_OP_DATA_TO_COMPTORET(_d) ((_d) & 0xffff) +/* + * Datasrc reserves 5 bits but only uses 4 up to Zen 5. + * From PPR for AMD Family 1Ah Model 70h A0 + */ #define IBS_OP_DATA2 0xC0011036 /* IBS Op Data 2 */ #define IBS_OP_DATA2_RMTSOCKET (1ULL << 9) /* Remote Socket */ #define IBS_OP_DATA2_STRMST (1ULL << 8) /* Streaming Store */ +#define IBS_OP_DATA2_HITO (1 << 5) +#define IBS_OP_DATA2_DATASRC(_d) (((_d) & 0x7) | (((_d) >> 3) & 0x8)) + +#define IBS_DATASRC_LOCALCCX 0x1 +#define IBS_DATASRC_NEARFARCACHE_NEAR 0x2 +#define IBS_DATASRC_DRAMIO_NEAR 0x3 +#define IBS_DATASRC_NEARFARCACHE_FAR 0x5 +#define IBS_DATASRC_LONGLAT_NEARFAR 0x6 +#define IBS_DATASRC_DRAMIO_FAR 0x7 +#define IBS_DATASRC_EXT_NEARFAR 0x8 +#define IBS_DATASRC_PEER_NEARFAR 0xC + +/* + * Memwidth reserves 4 bits but only uses 3 up to Zen 5. + * From PPR for AMD Family 1Ah Model 70h A0 + */ #define IBS_OP_DATA3 0xC0011037 /* IBS Op Data 3 */ +#define IBS_OP_DATA3_PREFETCH (1ULL << 21) +#define IBS_OP_DATA3_L2MISS (1ULL << 20) #define IBS_OP_DATA3_DCPHYADDRVALID (1ULL << 18) /* DC Physical Address */ #define IBS_OP_DATA3_DCLINADDRVALID (1ULL << 17) /* DC Linear Address */ #define IBS_OP_DATA3_LOCKEDOP (1ULL << 15) /* DC Locked Op */ @@ -189,6 +215,12 @@ #define IBS_OP_DATA3_STORE (1ULL << 1) /* Store */ #define IBS_OP_DATA3_LOAD (1ULL << 0) /* Load */ #define IBS_OP_DATA3_TO_DCLAT(_c) ((_c >> 32) & 0x0000FFFF) +#define IBS_OP_DATA3_MEMWIDTH(_d) (((_d) >> 22) & 0x7) +#define IBS_OP_DATA3_PGSZ(_d) (((_d) >> 4) & 0x3) +#define IBS_OP_DATA3_TO_TLBREFILLLAT(_c) (((_c) >> 48) & 0x0000ffff) +#define IBS_OP_DATA3_TO_OPENMEMREQS(_c) (((_c) >> 26) & 0x003f) + +#define IBSOPDATA2_VALIDMASK (IBS_OP_DATA3_LOAD | IBS_OP_DATA3_DCMISS | IBS_OP_DATA3_L2MISS) #define IBS_OP_DC_LINADDR 0xC0011038 /* IBS DC Linear Address */ #define IBS_OP_DC_PHYSADDR 0xC0011039 /* IBS DC Physical Address */