From owner-freebsd-acpi@FreeBSD.ORG Tue Apr 12 03:07:32 2005 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id CE93A16A4CE for ; Tue, 12 Apr 2005 03:07:32 +0000 (GMT) Received: from mh2.centtech.com (moat3.centtech.com [207.200.51.50]) by mx1.FreeBSD.org (Postfix) with ESMTP id E6B9B43D2F for ; Tue, 12 Apr 2005 03:07:31 +0000 (GMT) (envelope-from anderson@centtech.com) Received: from [192.168.42.22] (andersonbox2.centtech.com [192.168.42.22]) by mh2.centtech.com (8.13.1/8.13.1) with ESMTP id j3C37UwP058109; Mon, 11 Apr 2005 22:07:30 -0500 (CDT) (envelope-from anderson@centtech.com) Message-ID: <425B3B4C.4080306@centtech.com> Date: Mon, 11 Apr 2005 22:06:52 -0500 From: Eric Anderson User-Agent: Mozilla/5.0 (X11; U; FreeBSD i386; en-US; rv:1.7.5) Gecko/20050325 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Nate Lawson References: <42552573.6040902@centtech.com> <42556AA3.5040403@root.org> In-Reply-To: <42556AA3.5040403@root.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit cc: freebsd-acpi@freebsd.org Subject: Re: Suspend powers off machine X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Apr 2005 03:07:33 -0000 Nate Lawson wrote: > Eric Anderson wrote: > >> I'm going to have some time on my hands next week, and I'd like to >> hunt down an issue with my laptop. When attempting to go into S3, >> instead of going into S3, it powers off (uncleanly). Can anyone tell >> me where this might be happening in the code, so I can start the >> printf debugging process? > > > It's nearly 100% certain it happens in AcpiEnterSleepState at the write > to PM1A. This is in sys/contrib/dev/acpica/hwsleep.c You're right - it happens here: Status = AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM1A_CONTROL, PM1AControl); In that subroutine.. > In thinking about it, my best theory is that the southbridge interprets > this write as an S4/S5 transition. Perhaps the ASL gives the wrong > value to write? Perhaps the chipset is not being prepared for S3 > correctly. In any case, better chipset specs would probably help > diagnose this. Not sure what to look for in the ASL for the valid/invalid values. What chipset info do you need? > Other possibilities are that the setting of SLP_EN should be done at the > same time as the write with the SLP_TYP value (i.e. write > SLP_TYPE_S3|SLP_EN instead of splitting the write into two phases). It > also may be that the previous steps like disabling BM ctrl are not > appropriate for some chipsets. > > If you can get more info, I can refine this theory. I'm going to keep doing some printf's in the hwregs.c file to see if I can track down anything closer. Eric -- ------------------------------------------------------------------------ Eric Anderson Sr. Systems Administrator Centaur Technology A lost ounce of gold may be found, a lost moment of time never. ------------------------------------------------------------------------